IDT72801/728211/72821/72831/72841/72851 DUAL CMOS SyncFIFOTM
DUAL 256 x 9, DUAL 512 x 9, DUAL 1K x 9, DUAL 2K x 9, DUAL 4K x 9, DUAL 8K x 9
COMMERCIAL AND INDUSTRIAL
TEMPERATURERANGES
A read and write should not be performed simultaneously to the offset
registers.
LDA WENA1
LDB WENB1
WCLKA
WCLKB
OPERATION ON FIFO A
OPERATION ON FIFO B
0
0
Empty Offset (LSB)
OUTPUTS:
Empty Offset (MSB)
FullOffset(LSB)
Full Offset (MSB)
Full Flag (FFA, FFB) — FFA (FFB) will go LOW, inhibiting further write
operations,when ArrayA(B)isfull. Ifnoreadsareperformedafterreset,FFA
(FFB) will go LOW after 256 writes to the IDT72801's FIFO A (B); 512 writes
totheIDT72811'sFIFOA(B);1,024writestotheIDT72821'sFIFOA(B);2,048
writes to the IDT72831's FIFO A (B); 4,096 writes to the IDT72841's FIFO A
(B); or 8,192 writes to the IDT72851's FIFO A (B).
0
1
1
0
1
NoOperation
WriteIntoFIFO
NoOperation
FFA(FFB)issynchronizedwithrespecttotheLOW-to-HIGHtransitionofthe
WriteClockWCLKA(WCLKB).
1
EmptyFlag(EFA,EFB)—EFA(EFB)willgoLOW,inhibitingfurtherread
operations,whenthereadpointerisequaltothewritepointer,indicatingthat
Array A (B) is empty.
EFA(EFB)is synchronizedwithrespecttotheLOW-to-HIGHtransitionof
the Read Clock RCLKA (RCLKB).
NOTE:
1. For the purposes of this table, WENA2 and WENB2 = VIH.
2. The same selection sequence applies to reading from the registers. RENA1 and
RENA2 (RENB1 and RENB2) are enabled and read is performed on the LOW-to-
HIGH transition of RCLKA (RCLKB).
Figure 2. Writing to Offset Registers for FIFOs A and B
72821 - DUAL 1,024 x 9
72801 - DUAL 256 x 9
72811 - DUAL 512 x 9
8
8
8
8
7
7
0
0
0
0
8
8
8
8
0
0
0
0
8
8
8
8
0
0
0
0
7
7
7
7
Empty Offset (LSB)
Default Value 007H
Empty Offset (LSB)
Default Value 007H
Empty Offset (LSB) Reg.
Default Value 007H
1
1
(MSB)
(MSB)
0
0
Full Offset (LSB)
Full Offset (LSB) Reg.
Default Value 007H
Full Offset (LSB) Reg.
Default Value 007H
Default Value 007H
1
1
(MSB)
0
(MSB)
0
72831 - DUAL 2,048 x 9
72841 - DUAL 4,096 x 9
72851 - DUAL 8,192 x 9
8
8
8
8
7
0
0
0
0
8
8
8
8
0
0
0
0
8
8
8
8
0
0
0
0
7
7
7
7
Empty Offset (LSB)
Default Value 007H
Empty Offset (LSB)
Default Value 007H
Empty Offset (LSB) Reg.
Default Value 007H
3
4
2
(MSB)
(MSB)
(MSB)
0
0
0
7
Full Offset (LSB)
Full Offset (LSB)
Full Offset (LSB) Reg.
Default Value 007H
Default Value 007H
Default Value 007H
3
4
2
(MSB)
(MSB)
(MSB)
0
0
0
3034 drw 04
Figure 3. Offset Register Formats and Default Values for the A and B FIFOs
MARCH 2013
7
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