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723624

更新时间： 2023-12-20 18:44:20

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723624 数据手册

IDT723624/723634/723644CMOSSyncBiFIFO™WITHBUS-MATCHING

256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

COMMERCIALTEMPERATURERANGE

DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION

The ICC(f) current for the graph in Figure 1 was taken while simultaneously reading and writing a FIFO on the IDT723624/723634/723644 with

CLKA and CLKB set to fS. All data inputs and data outputs change state during each clock cycle to consume the highest supply current. Data

outputs were disconnected to normalize the graph to a zero capacitance load. Once the capacitance load per data-output channel and the number

of IDT723624/723634/723644 inputs driven by TTL HIGH levels are known, the power dissipation can be calculated with the equation below.

CALCULATING POWER DISSIPATION

With ICC(f) taken from Figure 1, the maximum power dissipation (PT) of these FIFOs may be calculated by:

PT = VCC x [ICC(f) + (N x ΔICC x dc)] + Σ(CL x VCC X fo)

where:

number of used outputs = 36-bit (long word), 18-bit (word) or 9-bit (byte) bus size

increase in power supply current for each input at a TTL HIGH level

duty cycle of inputs at a TTL HIGH level of 3.4 V

outputcapacitanceload

ΔICC

switchingfrequencyofanoutput

300

250

data = 1/2 fS

= 25°C

= 0pF

VCC = 5.5V

VCC = 5.0V

200

150

100

VCC = 4.5V

3270 drw03

fS ⎯ Clock Frequency ⎯ MHz

Figure 1. Typical Characteristics: Supply Current (ICC) vs. Clock Frequency (fS)

1...4 5 678 9 10...35

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型号	品牌	描述	获取价格	数据表
723624L12PF	IDT	Bi-Directional FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	获取价格
723624L12PF8	IDT	Bi-Directional FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	获取价格
723624L15PFG	IDT	CMOS SyncBiFIFO WITH BUS-MATCHING	获取价格
723624L15PFG8	IDT	CMOS SyncBiFIFO WITH BUS-MATCHING	获取价格
723624L20PF	IDT	Bi-Directional FIFO, 512X36, 12ns, Synchronous, CMOS, PQFP128	获取价格
723624L20PFI	IDT	Bi-Directional FIFO, 512X36, 12ns, Synchronous, CMOS, PQFP128	获取价格