5秒后页面跳转
72245LB10JG PDF预览

72245LB10JG

更新时间: 2024-11-29 00:43:31
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片内存集成电路
页数 文件大小 规格书
16页 338K
描述
CMOS SyncFIFO

72245LB10JG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:PLCC
包装说明:LCC-68针数:68
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.41
Samacsys Description:PLCC最长访问时间:6.5 ns
周期时间:10 nsJESD-30 代码:R-PQCC-J68
JESD-609代码:e3内存密度:73728 bit
内存集成电路类型:OTHER FIFO内存宽度:18
湿度敏感等级:1功能数量:1
端子数量:68字数:4096 words
字数代码:4000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:4KX18可输出:YES
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
最大待机电流:0.005 A子类别:FIFOs
最大压摆率:0.06 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:J BEND端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

72245LB10JG 数据手册

 浏览型号72245LB10JG的Datasheet PDF文件第2页浏览型号72245LB10JG的Datasheet PDF文件第3页浏览型号72245LB10JG的Datasheet PDF文件第4页浏览型号72245LB10JG的Datasheet PDF文件第5页浏览型号72245LB10JG的Datasheet PDF文件第6页浏览型号72245LB10JG的Datasheet PDF文件第7页 
CMOS SyncFIFOTM  
256 x 18, 512 x 18, 1,024 x 18,  
2,048 x 18, and 4,096 x 18  
IDT72205LB, IDT72215LB,  
IDT72225LB, IDT72235LB,  
IDT72245LB  
writecontrols.TheseFIFOsareapplicableforawidevarietyofdatabuffering  
needs, such as optical disk controllers, Local Area Networks (LANs), and  
interprocessorcommunication.  
FEATURES:  
256 x 18-bit organization array (IDT72205LB)  
512 x 18-bit organization array (IDT72215LB)  
1,024 x 18-bit organization array (IDT72225LB)  
2,048 x 18-bit organization array (IDT72235LB)  
4,096 x 18-bit organization array (IDT72245LB)  
10 ns read/write cycle time  
TheseFIFOshave18-bitinputandoutputports.Theinputportiscontrolled  
byafree-runningclock(WCLK),andaninputenablepin(WEN).Dataisread  
intothesynchronousFIFOoneveryclockwhenWENisasserted.Theoutput  
portiscontrolledbyanotherclockpin(RCLK)andanotherenablepin(REN).  
Thereadclockcanbetiedtothewriteclockforsingleclockoperationorthe  
twoclockscanrunasynchronousofoneanotherfordual-clockoperation. An  
OutputEnablepin(OE)isprovidedonthereadportforthree-statecontrolof  
theoutput.  
ThesynchronousFIFOshavetwofixedflags, Empty (EF)andFull(FF),  
andtwoprogrammableflags,Almost-Empty(PAE)andAlmost-Full(PAF).The  
offsetloadingoftheprogrammableflagsiscontrolledbyasimplestatemachine,  
andisinitiatedbyassertingtheLoadpin(LD). AHalf-Fullflag(HF)isavailable  
when the FIFO is used in a single device configuration.  
ThesedevicesaredepthexpandableusingaDaisy-Chaintechnique.The  
XI and XO pins are used to expand the FIFOs. In depth expansion configu-  
ration, First Load (FL) is grounded on the first device and set to HIGH for all  
other devices in the Daisy Chain.  
The IDT72205LB/72215LB/72225LB/72235LB/72245LB is fabricated  
usinghigh-speedsubmicronCMOStechnology.  
Empy and Full flags signal FIFO status  
Easy expandable in depth and width  
Asynchronous or coincident read and write clocks  
Programmable Almost-Empty and Almost-Full flags with  
default settings  
Half-Full flag capability  
Dual-Port zero fall-through time architecture  
Output enable puts output data bus in high-impedence state  
High-performance submicron CMOS technology  
Available in a 64-lead thin quad flatpack (TQFP/STQFP)  
and plastic leaded chip carrier (PLCC)  
Industrial temperature range (–40°C to +85°C) is available  
Green parts available, see ordering information  
DESCRIPTION:  
The IDT72205LB/72215LB/72225LB/72235LB/72245LB are very high  
speed,low-powerFirst-In,First-Out(FIFO)memorieswithclockedreadand  
FUNCTIONAL BLOCK DIAGRAM  
WCLK  
D0-D17  
INPUT REGISTER  
OFFSET REGISTER  
FLAG  
WRITE CONTROL  
LOGIC  
LOGIC  
RAM ARRAY  
256 x 18, 512 x 18  
1,024 x 18, 2,048 x 18  
4,096 x 18  
)
READ POINTER  
WRITE POINTER  
READ CONTROL  
LOGIC  
EXPANSION LOGIC  
OUTPUT REGISTER  
RESET LOGIC  
2766 drw 01  
RCLK  
Q0-Q17  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology, Inc. SyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
MARCH 2013  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
1
©2013 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-2766/3  

72245LB10JG 替代型号

型号 品牌 替代类型 描述 数据表
72245LB10JG8 IDT

完全替代

CMOS SyncFIFO
72245LB15J IDT

类似代替

PLCC-68, Tube

与72245LB10JG相关器件

型号 品牌 获取价格 描述 数据表
72245LB10JG8 IDT

获取价格

CMOS SyncFIFO
72245LB10JGI IDT

获取价格

CMOS SyncFIFO
72245LB10JGI8 IDT

获取价格

CMOS SyncFIFO
72245LB10PF9 IDT

获取价格

FIFO, 4KX18, 6.5ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64
72245LB10PFG IDT

获取价格

CMOS SyncFIFO
72245LB10PFG8 IDT

获取价格

CMOS SyncFIFO
72245LB10PFGI IDT

获取价格

CMOS SyncFIFO
72245LB10PFGI8 IDT

获取价格

CMOS SyncFIFO
72245LB10TF IDT

获取价格

TQFP-64, Tray
72245LB10TFG IDT

获取价格

FIFO, 4KX18, 6.5ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, STQFP-64