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71V416YS12BEG1 PDF预览

71V416YS12BEG1

更新时间: 2024-02-16 09:29:01
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
9页 137K
描述
Standard SRAM, 256KX16, 12ns, CMOS, PBGA48

71V416YS12BEG1 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete包装说明:BGA, BGA48,6X8,30
Reach Compliance Code:compliant风险等级:5.84
Is Samacsys:N最长访问时间:12 ns
I/O 类型:COMMONJESD-30 代码:S-PBGA-B48
JESD-609代码:e1内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:256KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA48,6X8,30封装形状:SQUARE
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大待机电流:0.02 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.13 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
Base Number Matches:1

71V416YS12BEG1 数据手册

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IDT71V416YS, IDT71V416YL 3.3V CMOS Static RAM  
for Automotive Applications 4 Meg (256K x 16-Bit)  
Automotive Temperature Ranges  
AbsoluteMaximumRatings(1)  
RecommendedOperating  
TemperatureandSupply  
Voltage  
Symbol  
Rating  
Value  
Unit  
V
Supply Voltage Relative to  
VSS  
VDD  
-0.5 to +4.6  
-0.5 to VDD+0.5  
Grade  
Temperature  
-40°C to +125°C  
-40°C to +105°C  
-40°C to +85°C  
0°C to +70°C  
VSS  
0V  
0V  
0V  
0V  
VDD  
Terminal Voltage Relative to  
VSS  
V
Automotive Grade 1  
Automotive Grade 2  
Automotive Grade 3  
Automotive Grade 4  
See Below  
See Below  
See Below  
VIN, VOUT  
TBIAS  
TJ  
Temperature Under Bias  
Junction Temperature Range  
Storage Temperature  
Power Dissipation  
-55 to +125  
-40 to +150  
-65 to +150  
1
oC  
oC  
oC  
W
See Below  
TSTG  
PT  
6817 tbl 05  
RecommendedDCOperating  
Conditions  
IOUT  
DC Output Current  
50  
mA  
6817 tbl 04  
NOTE:  
Symbol  
Parameter  
Supply Voltage  
Ground  
Min.  
3.0  
0
Typ.  
3.3  
0
Max.  
Unit  
V
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may  
cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated  
in the operational sections of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect reliability.  
VDD  
3.6  
0
VSS  
V
(1)  
____  
VDD+0.3  
0.8  
VIH  
VIL  
Input High Voltage  
Input Low Voltage  
2.0  
V
(1)  
____  
-0.3  
V
SOJ/TSOPCapacitance  
(TA = +25°C, f = 1.0MHz)  
6817 tbl 06  
NOTE:  
1. Refer to maximum overshoot/undershoot diagram below. The measured  
voltage at device pin must not exceed half sinusoidal wave with 2V peak and  
half period of 2ns.  
Symbol  
CIN  
Parameter(1)  
Input Capacitance  
I/O Capacitance  
Conditions  
VIN = 3dV  
VOUT = 3dV  
Max. Unit  
7
8
pF  
CI/O  
pF  
MaximumOvershoot/Undershoot  
6817 tbl 02  
+2V  
48BGACapacitance  
V
IH  
2ns  
(TA = +25°C, f = 1.0MHz)  
Symbol  
CIN  
Parameter(1)  
Input Capacitance  
I/O Capacitance  
Conditions  
VIN = 3dV  
VOUT = 3dV  
Max. Unit  
2ns  
IL  
V
6
7
pF  
-2V  
6817 drw 12  
CI/O  
pF  
6817 tbl 02b  
NOTE:  
1. This parameter is guaranteed by device characterization, but not production  
tested.  
6.42  
3

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