IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Commercial and Industrial Temperature Ranges
Pin Configuration — 256K x 18
AbsoluteMaximumRatings(1)
Commercial &
Symbol
Rating
Unit
Industrial Values
(2)
V
TERM
Te rm inal Vo ltag e with
Respect to GND
-0.5 to +4.6
V
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
NC
NC
NC
DDQ
A
NC
NC
10
(3,6)
(4,6)
(5,6)
V
TERM
2
Te rm inal Vo ltag e with
Respect to GND
-0.5 to VDD
V
V
V
79
78
77
3
4
V
VDDQ
5
V
SS
76
75
74
73
V
SS
VTERM
Te rm inal Vo ltag e with
Respect to GND
-0.5 to VDD +0.5
-0.5 to VDDQ +0.5
6
NC
NC
I/O8
NC
I/OP1
I/O
I/O
7
8
7
9
I/O9
72
71
6
VTERM
Te rm inal Vo ltag e with
Respect to GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
SS
VSS
70
V
DDQ
VDDQ
69
68
67
66
65
64
I/O10
I/O
I/O
5
Commerical
Operating Temperature
I/O11
4
-0 to +70
oC
(1)
V
DD
VSS
(1)
V
DD
DD
V
V
V
DD
T (7)
A
(1)
V
DD
(3)
SS/ZZ
Industrial
Operating Temperature
-40 to +85
oC
oC
V
SS
63
62
61
60
59
58
57
56
55
54
53
I/O12
I/O13
I/O
I/O
3
2
V
DDQ
V
V
DDQ
SS
TBIAS
Temperature
Under Bias
-55 to +125
V
SS
I/O14
I/O15
I/OP2
NC
I/O
I/O
NC
NC
1
0
Storage
-55 to +125
oC
TSTG
Temperature
V
SS
VSS
V
DDQ
NC
NC
NC
VDDQ
P
T
Power Dissipation
DC Output Current
2.0
50
W
NC
NC
NC
,
52
51
IOUT
mA
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
4875 tbl 06
4875 drw 02a
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VDD terminals only.
Top View
TQFP
NOTES:
3. VDDQ terminals only.
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long
as the input voltage is ≥ VIH.
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to VSS as long as the input
voltage is ≤ VIL; on the latest die revision this pin supports ZZ (sleep
mode).
4. Input terminals only.
5. I/O terminals only.
6. This is a steady-state DC parameter that applies after the power supply has
reached its nominal operating value. Power sequencing is not necessary;
however, the voltage on any input or I/O pin cannot exceed VDDQ during power
supply ramp up.
7. TA is the "instant on" case temperature.
100TQFPCapacitance(1)
(TA = +25° C, f = 1.0MHz)
119 BGA Capacitance(1)
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
IN = 3dV
OUT = 3dV
Max. Unit
(TA = +25° C, f = 1.0MHz)
CIN
V
5
7
pF
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
IN = 3dV
OUT = 3dV
Max. Unit
CI/O
V
pF
CIN
V
7
7
pF
4875 tbl 07
165 fBGA Capacitance(1)
CI/O
V
pF
(TA = +25° C, f = 1.0MHz)
4875 tbl 07a
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
IN = 3dV
Max. Unit
CIN
V
TBD pF
CI/O
VOUT = 3dV
TBD pF
4875 tbl 07b
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
6.462
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