IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Commercial and Industrial Temperature Ranges
RecommendedOperating
TemperatureandSupplyVoltage
Grade
Temperature(1)
0°C to +70°C
-40°C to +85°C
V
SS
V
DD
VDDQ
Commercial
Industrial
0V
0V
3.3V±5%
3.3V±5%
2.5V±5%
2.5V±5%
4875 tbl 05
NOTES:
1. TA is the "instant on" case temperature.
Pin Configuration — 128K x 36
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
79
78
77
I/OP3
I/O16
I/O17
I/OP2
I/O15
I/O14
2
3
4
VDDQ
V
DDQ
5
VSS
76
75
74
73
VSS
6
I/O18
I/O19
I/O20
I/O21
I/O13
I/O12
I/O11
I/O10
7
8
9
72
71
70
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VSS
V
V
SS
VDDQ
DDQ
69
68
67
66
65
64
I/O22
I/O9
I/O8
I/O23
(1)
VDD
V
VDD
SS
(1)
V
DD
DD
(1)
V
VDD
(3)
VSS
VSS/ZZ
63
62
I/O24
I/O25
I/O7
I/O6
61
60
59
VDDQ
VDDQ
VSS
V
SS
I/O26
I/O27
I/O28
I/O29
I/O
I/O
I/O
I/O
5
58
57
56
55
4
3
2
VSS
V
V
SS
54
53
VDDQ
DDQ
I/O30
I/O31
I/OP4
I/O
I/O
I/OP1
1
52
51
0
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
,
4875 drw 02
Top View
TQFP
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the input voltage is ≥ VIH.
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to VSS as long as the input voltage is ≤ VIL; on the latest die revision this
pin supports ZZ (sleep mode).
6.42
5