Datasheet > 71342LA35J8

71342LA35J8

更新时间： 2023-07-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
14页	124K
描述
PLCC-52, Reel

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71342LA35J8 数据手册

IDT71342SA/LA

High-Speed 4K x 8 Dual-Port Static RAM with Semaphore

Industrial and Commercial Temperature Ranges

Data Retention Characteristics

(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V

Symbol

Parameter

Test Condition

Min.

Typ.⁽¹⁾

Max.

Unit

___

VDR

VCC for Data Retention

2.0

___

CCDR

Data Retention Current

CC = 2V, CE > VHC

COM'L. & IND.

100

1500

µA

(3)

CDR

___

Chip Deselect to Data Retention Time

Operation Recovery Time

SEM > VHC

IN > VHC or < VLC

(3)

(2)

___

2721 tbl 07

NOTES:

1. V^CC= 2V, TA = +25°C, and are not production tested.

2. t^RC= Read Cycle Time.

3. This parameter is guaranteed by device characterization, but is not production tested.

Data Rention Waveform

DATA RETENTION MODE

DR > 2V

VCC

4.5V

CDR

VDR

VIH

2721 drw 04

AC Test Conditions

Input Pulse Levels

GND to 3.0V

5ns

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

1.5V

Figures 1 and 2

2721 tbl 08

+5V

1250Ω

DATAOUT

775Ω

DATAOUT

775Ω

5pF *

30pF

2721 drw 05

2721 drw 06

Figure 1. AC Output Test Load

Figure 2. Output Test Load

(for t^LZ, tHZ, tWZ, tOW)

*Including scope and jig

6.42

1 2 3 456 7 8...14

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