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71024S15YI8 PDF预览

71024S15YI8

更新时间: 2024-11-26 14:49:19
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 79K
描述
Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

71024S15YI8 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOJ包装说明:0.400 INCH, PLASTIC, SOJ-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:3A991.B.2.BHTS代码:8542.32.00.41
风险等级:5.19Is Samacsys:N
最长访问时间:15 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-J32JESD-609代码:e0
长度:20.955 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ32,.44封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified座面最大高度:3.683 mm
最大待机电流:0.01 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.155 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:10.16 mm
Base Number Matches:1

71024S15YI8 数据手册

 浏览型号71024S15YI8的Datasheet PDF文件第2页浏览型号71024S15YI8的Datasheet PDF文件第3页浏览型号71024S15YI8的Datasheet PDF文件第4页浏览型号71024S15YI8的Datasheet PDF文件第5页浏览型号71024S15YI8的Datasheet PDF文件第6页浏览型号71024S15YI8的Datasheet PDF文件第7页 
CMOS Static RAM  
IDT71024  
1 Meg (128K x 8-Bit)  
Features  
Description  
128K x 8 advanced high-speed CMOS static RAM  
Commercial (0°C to +70°C), Industrial (–40°C to +85°C)  
Equal access and cycle times  
TheIDT71024isa1,048,576-bithigh-speedstaticRAMorganizedas  
128K x 8. It is fabricated using IDTs high-performance, high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneeds.  
— CommercialandIndustrial:12/15/20ns  
Two Chip Selects plus one Output Enable pin  
Bidirectional inputs and outputs directly  
TTL-compatible  
Low power consumption via chip deselect  
Available in 300 and 400 mil Plastic SOJ.  
The IDT71024 has an output enable pin which operates as fast  
as 6ns, with address access times as fast as 12ns available. All  
bidirectional inputs and outputs of the IDT71024 are TTL-compat-  
ible, and operation is from a single 5V supply. Fully static asynchro-  
nous circuitry is used; no clocks or refreshes are required for  
operation.  
The IDT71024 is packaged in 32-pin 300 mil Plastic SOJ and 32-  
pin 400 mil Plastic SOJ.  
Functional Block Diagram  
A0  
1,048,576-BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A16  
8
8
I/O0–I/O7  
¥
I/O CONTROL  
8
WE  
OE  
CS1  
CS2  
CONTROL  
LOGIC  
2964 drw 01  
FEBRUARY 2001  
1
©2000IntegratedDeviceTechnology,Inc.  
DSC-2964/14  

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