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70V9389L6PFG PDF预览

70V9389L6PFG

更新时间: 2024-11-29 04:50:39
品牌 Logo 应用领域
艾迪悌 - IDT 时钟静态存储器内存集成电路
页数 文件大小 规格书
19页 201K
描述
Application Specific SRAM, 64KX18, 15ns, CMOS, PQFP100

70V9389L6PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.84最长访问时间:15 ns
最大时钟频率 (fCLK):100 MHzI/O 类型:COMMON
JESD-30 代码:S-PQFP-G100JESD-609代码:e3
内存密度:1179648 bit内存集成电路类型:APPLICATION SPECIFIC SRAM
内存宽度:18湿度敏感等级:3
端口数量:2端子数量:100
字数:65536 words字数代码:64000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX18
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP100,.63SQ,20
封装形状:SQUARE封装形式:FLATPACK
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大待机电流:0.002 A最小待机电流:3 V
子类别:SRAMs最大压摆率:0.28 mA
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30Base Number Matches:1

70V9389L6PFG 数据手册

 浏览型号70V9389L6PFG的Datasheet PDF文件第2页浏览型号70V9389L6PFG的Datasheet PDF文件第3页浏览型号70V9389L6PFG的Datasheet PDF文件第4页浏览型号70V9389L6PFG的Datasheet PDF文件第5页浏览型号70V9389L6PFG的Datasheet PDF文件第6页浏览型号70V9389L6PFG的Datasheet PDF文件第7页 
HIGH-SPEED 3.3V  
64K x18/x16  
SYNCHRONOUS PIPELINED  
DUAL-PORT STATIC RAM  
IDT70V9389/289L  
Features:  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed clock to data access  
– Commercial:6/7.5/9/12ns(max.)  
Industrial:9ns (max.)  
Full synchronous operation on both ports  
– 3.5ns setup to clock and 0ns hold on all control, data, and  
addressinputs  
Data input, address, and control registers  
– Fast 6.5ns clock to data out in the Pipelined output mode  
– Self-timedwriteallowsfastcycletime  
Low-power operation  
IDT70V9389/289L  
– 10ns cycle time, 100MHz operation in Pipelined output mode  
Separate upper-byte and lower-byte controls for  
multiplexed bus and bus matching compatibility  
LVTTL- compatible, single 3.3V (±0.3V) power supply  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Available in a 128-pin Thin Quad Flatpack (TQFP) and  
100-pin Thin Quad Flatpack (TQFP)  
Green parts available, see ordering information  
Active:500mW(typ.)  
Standby: 1.5mW (typ.)  
Flow-Through or Pipelined output mode on either port via  
the FT/PIPE pins  
Counter enable and reset features  
Dual chip enables allow for depth expansion without  
additional logic  
FunctionalBlockDiagram  
R/  
W
R
R/  
W
L
L
UB  
R
UB  
CE0L  
CE1L  
CE0R  
CE1R  
1
0
1
0
0/1  
0/1  
LB  
OE  
L
LB  
OE  
R
L
R
1b 0b  
0a 1a  
1a 0a  
a
0b 1b  
b
FT/PIPE  
L
0/1  
0/1  
FT/PIPER  
b
a
(1)  
(2)  
I/O9R-I/O17R  
I/O9L-I/O17L  
I/O  
Control  
I/O  
Control  
(1)  
(1)  
I/O0R-I/O8R  
I/O0L-I/O8L  
A
15R  
A
15L  
0L  
L
L
Counter/  
Address  
Reg.  
Counter/  
Address  
Reg.  
A
MEMORY  
ARRAY  
A
C0LRK  
R
R
CLK  
ADS  
CNTEN  
ADS  
CNTEN  
R
L
CNTRST  
R
CNTRST  
L
4856 drw 01  
NOTE:  
1. I/O0X - I/O7X for IDT70V9289.  
2. I/O8X - I/O15X for IDT70V9289.  
JANUARY 2006  
1
©2006IntegratedDeviceTechnology,Inc.  
DSC-4856/4  

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