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70V9079L12PFGI8 PDF预览

70V9079L12PFGI8

更新时间: 2024-11-24 21:12:59
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
19页 163K
描述
Dual-Port SRAM

70V9079L12PFGI8 技术参数

生命周期:Active包装说明:QFP,
Reach Compliance Code:compliant风险等级:5.74
最长访问时间:12 nsJESD-30 代码:S-PQFP-G100
内存密度:262144 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:8功能数量:1
端子数量:100字数:32768 words
字数代码:32000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:32KX8封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:SQUARE
封装形式:FLATPACK并行/串行:PARALLEL
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子位置:QUAD
Base Number Matches:1

70V9079L12PFGI8 数据手册

 浏览型号70V9079L12PFGI8的Datasheet PDF文件第2页浏览型号70V9079L12PFGI8的Datasheet PDF文件第3页浏览型号70V9079L12PFGI8的Datasheet PDF文件第4页浏览型号70V9079L12PFGI8的Datasheet PDF文件第5页浏览型号70V9079L12PFGI8的Datasheet PDF文件第6页浏览型号70V9079L12PFGI8的Datasheet PDF文件第7页 
HIGH-SPEED 3.3V  
64/32K x 8 SYNCHRONOUS  
DUAL-PORT STATIC RAM  
IDT70V9089/79S/L  
Š
Counter enable and reset features  
Dual chip enables allow for depth expansion without  
additional logic  
Full synchronous operation on both ports  
– 4ns setup to clock and 1ns hold on all control, data, and  
addressinputs  
Features:  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed clock to data access  
– Commercial:6.5/7.5/9/12/15ns(max.)  
– Industrial: 12ns (max.)  
Data input, address, and control registers  
Fast 6.5ns clock to data out in the Pipelined output mode  
Low-power operation  
– IDT70V9089/79S  
– Self-timedwriteallowsfastcycletime  
10nscycletime,100MHzoperationinthePipelinedoutputmode  
Active:429mW(typ.)  
Standby: 3.3mW (typ.)  
– IDT70V9089/79L  
Active:429mW(typ.)  
Standby: 1.32mW (typ.)  
Flow-Through or Pipelined output mode on either port via  
the FT/PIPE pin  
LVTTL- compatible, single 3.3V (±0.3V) power supply  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Available in a 100 pin Thin Quad Flatpack (TQFP) package  
Green parts available, see ordering information  
FunctionalBlockDiagram  
R/W  
OE  
L
L
R/W  
OE  
R
R
CE  
CE10LL  
CE0R  
CE1R  
1
1
0
0
0/1  
0/1  
1
0
1
0
0/1  
0/1  
FT/PIPE  
L
FT/PIPE  
R
,
I/O0L - I/O7L  
I/O0R - I/O7R  
I/O  
I/O  
Control  
Control  
(1)  
(1)  
A15R  
A
15L  
Counter/  
Address  
Reg.  
Counter/  
Address  
Reg.  
A
C0LRK  
R
R
MEMORY  
ARRAY  
A
0L  
CLK  
ADS  
L
L
L
ADS  
CNTEN  
R
CNTEN  
CNTRST  
R
CNTRST  
L
3750 drw 01  
NOTE:  
1. A15X is a NC for IDT70V9079.  
JULY 2014  
1
DSC 3750/12  
©2014 Integrated Device Technology, Inc.  

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