Datasheet > 70V3569S5DRGI

70V3569S5DRGI

更新时间： 2022-12-29 21:15:33

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
17页	211K
描述
HIGH-SPEED 3.3V SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

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数据手册

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70V3569S5DRGI 数据手册

IDT70V3569S

High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM

Industrial and Commercial Temperature Ranges

Pin Configuration^(1,2,3,4)(con't.)

12/12/01

I/O16L

156

I/O19L

I/O19R

I/O20L

I/O20R

I/O16R

155

I/O15L

154

I/O15R

153

VSS

VDDQL

152

151

150

149

148

147

146

145

144

143

142

141

140

139

138

137

136

135

134

133

132

131

130

129

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

VDDQL

VSS

I/O14L

I/O14R

I/O13L

I/O13R

I/O21L

I/O21R

I/O22L

I/O22R

VSS

VDDQR

VSS

I/O12L

I/O12R

I/O11L

I/O11R

I/O23L

I/O23R

I/O24L

I/O24R

VSS

VDDQL

VSS

I/O10L

I/O10R

I/O9L

I/O25L

I/O25R

I/O26L

I/O26R

I/O9R

DDQR

DDQL

70V3569DR

DR-208

DDQR

(5)

DDQL

208-Pin PQFP

I/O8R

I/O8L

I/O7R

I/O7L

I/O27R

I/O27L

I/O28R

I/O28L

(6)

Top View

VSS

VDDQR

VSS

I/O6R

I/O6L

I/O5R

I/O5L

I/O29R

I/O29L

I/O30R

I/O30L

VSS

VDDQL

VSS

I/O4R

I/O4L

I/O3R

I/O3L

I/O31R

I/O31L

I/O32R

I/O32L

VSS

VDDQR

VSS

I/O2R

I/O2L

I/O1R

I/O1L

I/O33R

I/O33L

I/O34R

I/O34L

4831 drw 02a

NOTES:

1. All VDD pins must be connected to 3.3V power supply.

2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is

set to VIL (0V).

3. All VSS pins must be connected to ground supply.

4. Package body is approximately 28mm x 28mm x 3.5mm.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part-marking.

6.42

1 2 345 6 7...17

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