70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
3.3V
3.3V
AC Test Conditions
Input Pulse Levels
GND to 3.0V
3ns Max.
1.5V
590Ω
590Ω
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
DATAOUT
BUSY
INT
DATAOUT
1.5V
30pF
5pF*
435Ω
435Ω
Figures 1 and 2
3040 tbl 10
3040 drw 04
3040 drw 03
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for tLZ, tHZ, tWZ, tOW)
* Including scope and jig.
Timing of Power-Up Power-Down
CE
tPU
tPD
ICC
ISB
3040 drw 05
AC Electrical Characteristics Over the
OperatingTemperatureandSupplyVoltageRange(4)
70V261X25
70V261X55
Com'l Only
70V261X35
Com'l Only
Com'l
& Ind
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
____
____
____
t
RC
AA
ACE
ABE
AOE
OH
LZ
HZ
PU
PD
SOP
SAA
Read Cycle Time
25
35
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
____
____
____
t
Address Access Time
25
25
25
35
35
35
55
55
55
Chip Enable Access Time(3)
____
____
____
____
____
____
____
____
____
t
t
Byte Enable Access Time(3)
t
Output Enable Access Time
15
20
30
____
____
____
t
Output Hold from Address Change
Output Low-Z Time(1,2)
3
3
3
____
____
____
t
3
3
3
Output High-Z Time(1,2)
15
20
25
____
____
____
t
t
Chip Enable to Power Up Time(2)
Chip Disable to Power Down Time(2)
Semaphore Flag Update Pulse (OE or SEM)
Semaphore Address Access Time
0
0
0
____
____
____
____
____
____
t
25
35
50
____
____
____
t
15
15
15
____
____
____
t
35
45
65
ns
3040 tbl 11
NOTES:
1. Transition is measured 0mV from Low- or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL.
4. 'X' in part number indicates power rating (S or L).
6.642
Jun.04.21