IDT70T35/34L(IDT70T25/24L)
High-Speed 2.5V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
PRELIMINARY
Industrial and Commercial Temperature Ranges
Description
The IDT70T35/34L (IDT70T25/24L) is a high-speed 8/4K x 18 reads or writes to any location in memory. An automatic power down
(8/4Kx16)Dual-PortStaticRAM. TheIDT70T35/34L(IDT70T25/24L) featurecontrolledbyCEpermitstheon-chipcircuitryofeachporttoenter
is designed to be used as a stand-alone Dual-Port RAM or as a a very low standby power mode.
combinationMASTER/SLAVEDual-PortRAMfor36-bit(32-bit)orwider
FabricatedusingIDTsCMOShigh-performancetechnology,these
memory system applications results in full-speed, error-free operation devices typically operate on only 200mW of power.
withouttheneedforadditionaldiscretelogic.
TheIDT70T35/34L(IDT70T25/24L)ispackagedinaplastic100-pin
This device provides two independent ports with separate control, Thin Quad Flatpack and a 100-pin fine pitch Ball Grid Array.
address,andI/Opinsthatpermitindependent,asynchronousaccessfor
IDT70T35/34PinConfigurations(1,2,3,4)
12/06/02
Index
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1
N/C
N/C
I/O8L
I/O17L
I/O11L
I/O12L
I/O13L
I/O14L
Vss
N/C
N/C
N/C
N/C
75
74
2
3
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
4
5
A5L
A4L
A3L
A2L
A1L
A0L
6
7
8
9
I/O15L
I/O16L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
IDT70T35/34PF
PN100-1
(5)
INTL
VDD
BUSY
Vss
M/S
BUSY
L
100-Pin TQFP
Vss
I/O0R
I/O1R
I/O2R
(6)
Top View
R
INTR
VDD
A
A
A
A
A
0R
I/O3R
I/O4R
I/O5R
I/O6R
I/O8R
I/O17R
N/C
1R
2R
3R
4R
N/C
N/C
N/C
N/C
N/C
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
,
5639 drw 02
NOTES:
1. A12 is a NC for IDT70T34.
2. All VDD pins must be connected to power supply.
3. All VSS pins must be connected to ground.
4. PN100-1 package body is approximately 14mm x 14mm x 1.4mm.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part marking.
6.422