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7024

更新时间: 2023-12-20 18:44:44
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4K x 16 Dual-Port RAM

7024 数据手册

 浏览型号7024的Datasheet PDF文件第16页浏览型号7024的Datasheet PDF文件第17页浏览型号7024的Datasheet PDF文件第18页浏览型号7024的Datasheet PDF文件第20页浏览型号7024的Datasheet PDF文件第21页浏览型号7024的Datasheet PDF文件第22页 
7024S/L  
High-Speed 4K x 16 Dual-Port Static RAM  
Military, Industrial and Commercial Temperature Ranges  
it. If it was successful, it proceeds to assume control over the shared  
Itisimportanttonotethatafailedsemaphorerequestmustbefollowed  
resource.Ifitwasnotsuccessfulinsettingthelatch,itdeterminesthatthe byeitherrepeatedreadsorbywritingaoneintothesamelocation. The  
rightsideprocessorhassetthelatchfirst, hasthetokenandisusingthe reasonforthisiseasilyunderstoodbylookingatthesimplelogicdiagram  
sharedresource.Theleftprocessorcantheneitherrepeatedlyrequest ofthesemaphoreflaginFigure4.Twosemaphorerequestlatchesfeed  
thatsemaphore’sstatusorremoveitsrequestforthatsemaphoretoperform into a semaphore flag. Whichever latch is first to present a zero to the  
anothertaskandoccasionallyattemptagaintogaincontrolofthetokenvia semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother  
thesetandtestsequence.Oncetherightsidehasrelinquishedthetoken, sideHIGH.Thisconditionwillcontinueuntilaoneiswrittentothesame  
theleftsideshouldsucceedingainingcontrol.  
semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch  
ThesemaphoreflagsareactiveLOW.Atokenisrequestedbywriting havebeenwrittentoazerointhemeantime,thesemaphoreflagwillflip  
azerointoasemaphorelatchandisreleasedwhenthesamesidewrites overtotheothersideassoonasaoneiswrittenintothefirstside’srequest  
aonetothatlatch.  
latch.Thesecondside’sflagwillnowstayLOWuntilitssemaphorerequest  
The eight semaphore flags reside within the IDT7024 in a separate latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore  
memoryspacefromtheDual-PortRAM.This addressspaceisaccessed is requested and the processor which requested it no longer needs the  
byplacingaLOWinputontheSEMpin(whichactsasachipselectforthe resource, the entire system can hang up until a one is written into that  
semaphore flags) and using the other control pins (Address, OE, and semaphorerequestlatch.  
R/W)astheywouldbeusedinaccessingastandardStaticRAM. Each  
The critical case of semaphore timing is when both sides request  
oftheflagshasauniqueaddresswhichcanbeaccessedbyeitherside a single token by attempting to write a zero into it at the same time.  
throughaddresspinsA0A2.Whenaccessingthesemaphores,noneof The semaphore logic is specially designed to resolve this problem.  
theotheraddresspinshasanyeffect.  
If simultaneous requests are made, the logic guarantees that only one  
Whenwritingtoasemaphore,onlydatapinD0 isused.Ifalowlevel sidereceivesthetoken.Ifonesideisearlierthantheotherinmakingthe  
iswrittenintoanunusedsemaphorelocation,thatflagwillbesettoazero request, the first side to make the request will receive the token. If both  
on that side and a one on the other side (see Truth Table III). That requestsarriveatthesametime,theassignmentwillbearbitrarilymade  
semaphorecannowonlybemodifiedbythesideshowingthezero.When to one port or the other.  
aoneiswrittenintothesamelocationfromthesameside,theflagwillbe  
One caution that should be noted when using semaphores is that  
settoaoneforbothsides(unlessasemaphorerequestfromtheotherside semaphoresalonedonotguaranteethataccesstoaresourceissecure.  
ispending)andthencanbewrittentobybothsides.Thefactthattheside Aswithanypowerfulprogrammingtechnique,ifsemaphoresaremisused  
whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites or misinterpreted, a software error can easily happen.  
fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor  
Initializationofthesemaphoresisnotautomaticandmustbehandled  
communications.(Athoroughdiscussionontheuseofthisfeaturefollows viatheinitializationprogramatpower-up.Sinceanysemaphorerequest  
shortly.)Azerowrittenintothesamelocationfromtheothersidewillbe flagwhichcontainsazeromustberesettoaone,allsemaphoresonboth  
storedinthesemaphorerequestlatchforthatsideuntilthesemaphoreis sidesshouldhaveaonewrittenintothematinitializationfrombothsides  
freedbythefirstside.  
to assure that they will be free when needed.  
Whenasemaphoreflagisread,itsvalueisspreadintoalldatabitsso  
thataflagthatisaonereadsasaoneinalldatabitsandaflagcontaining  
azeroreadsasallzeros.Thereadvalueislatchedintooneside’soutput  
registerwhenthatside'ssemaphoreselect(SEM)andoutputenable(OE)  
signalsgoactive.Thisservestodisallowthesemaphorefromchanging  
stateinthemiddleofareadcycleduetoawritecyclefromtheotherside.  
Becauseofthislatch,arepeatedreadofasemaphoreinatestloopmust  
cause either signal (SEM or OE) to go inactive or the output will never  
change.  
UsingSemaphores—SomeExamples  
Perhapsthesimplestapplicationofsemaphoresistheirapplicationas  
resourcemarkersfortheIDT7024’sDual-PortRAM.Saythe4Kx16RAM  
wastobedividedintotwo2Kx16blockswhichweretobededicatedat  
anyonetimetoservicingeithertheleftorrightport.Semaphore0could  
be used to indicate the side which would control the lower section of  
memory,andSemaphore1couldbedefinedastheindicatorfortheupper  
sectionofmemory.  
AsequenceWRITE/READmustbeusedbythesemaphoreinorder  
to guarantee that no system level contention will occur. A processor  
requestsaccesstosharedresourcesbyattemptingtowriteazerointoa  
semaphorelocation.Ifthesemaphoreisalreadyinuse,thesemaphore  
requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,  
afactwhichtheprocessorwillverifybythesubsequentread(seeTruth  
TableIII).Asanexample,assumeaprocessorwritesazerototheleftport  
atafreesemaphorelocation.Onasubsequentread,theprocessorwill  
verifythatithaswrittensuccessfullytothatlocationandwillassumecontrol  
overtheresourceinquestion.Meanwhile,ifaprocessorontherightside  
attemptstowriteazerotothesamesemaphoreflagitwillfail, aswillbe  
verifiedbythefactthataonewillbereadfromthatsemaphoreontheright  
side during subsequent read. Had a sequence of READ/WRITE been  
usedinstead,systemcontentionproblemscouldhaveoccurredduringthe  
gap between the read and write cycles.  
Totakearesource, inthisexamplethelower2KofDual-PortRAM,  
the processor on the left port could write and then read a zero in to  
Semaphore0.Ifthistaskweresuccessfullycompleted(azerowasread  
back rather than a one), the left processor would assume control of the  
lower2K.Meanwhiletherightprocessorwasattemptingtogaincontrolof  
theresourceaftertheleftprocessor,itwouldreadbackaoneinresponse  
tothezeroithadattemptedtowriteintoSemaphore0. Atthispoint, the  
softwarecouldchoosetotryandgaincontrolofthesecond2Ksectionby  
writing,thenreadingazerointoSemaphore1.Ifitsucceededingaining  
control,itwouldlockouttheleftside.  
Once the left side was finished with its task, it would write a one to  
Semaphore 0 and may then try to gain access to Semaphore 1. If  
Semaphore1wasstilloccupiedbytherightside,theleftsidecouldundo  
itssemaphorerequestandperformothertasksuntilitwasabletowrite,then  
6.42  
19  
Feb.20.20  

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