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7016S25PFGBI PDF预览

7016S25PFGBI

更新时间: 2024-11-20 19:19:43
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
21页 349K
描述
Dual-Port SRAM, 16KX9, 25ns, CMOS, PQFP80, 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80

7016S25PFGBI 技术参数

生命周期:Obsolete包装说明:QFP,
Reach Compliance Code:compliant风险等级:5.75
Is Samacsys:N最长访问时间:25 ns
JESD-30 代码:S-PQFP-G80内存密度:147456 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:9
功能数量:1端子数量:80
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX9
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装形状:SQUARE封装形式:FLATPACK
并行/串行:PARALLEL筛选级别:MIL-PRF-38535
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子位置:QUAD
Base Number Matches:1

7016S25PFGBI 数据手册

 浏览型号7016S25PFGBI的Datasheet PDF文件第2页浏览型号7016S25PFGBI的Datasheet PDF文件第3页浏览型号7016S25PFGBI的Datasheet PDF文件第4页浏览型号7016S25PFGBI的Datasheet PDF文件第5页浏览型号7016S25PFGBI的Datasheet PDF文件第6页浏览型号7016S25PFGBI的Datasheet PDF文件第7页 
HIGH-SPEED  
16K X 9 DUAL-PORT  
STATIC RAM  
IDT7016S/L  
IDT7016 easily expands data bus width to 18 bits or  
Features  
more using the Master/Slave select when cascading  
more than one device  
M/S = VIH for BUSY output flag on Master  
M/S = VIL for BUSY input on Slave  
Busy and Interrupt Flag  
On-chip port arbitration logic  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in ceramic 68-pin PGA, 68-pin PLCC, and an  
80-pin TQFP  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Green parts available, see ordering information  
True Dual-Ported memory cells which allow simulta-  
neous reads of the same memory location  
High-speed access  
– Commercial:12/15/20/25/35ns (max.)  
– Industrial: 20ns (max.)  
– Military: 20/25/35ns (max.)  
Low-power operation  
– IDT7016S  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
– IDT7016L  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
Functional Block Diagram  
OEL  
OER  
CER  
CEL  
R/WR  
R/W  
L
I/O0L- I/O8L  
I/O0R-I/O8R  
I/O  
I/O  
Control  
Control  
BUSY (1,2)  
L
(1,2)  
BUSY  
R
A
13L  
A
13R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
A
0L  
14  
14  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE  
OE  
L
L
CE  
OE  
R/W  
R
R
R
R/W  
L
SEM  
L
SEM  
R
M/S  
(2)  
(2)  
INTL  
INT  
R
3190 drw 01  
NOTES:  
1. In MASTER mode: BUSY is an output and is a push-pull driver  
InSLAVEmode:BUSYisinput.  
2. BUSYoutputsandINToutputsarenon-tri-statedpush-pulldrivers.  
OCTOBER2014  
1
©2014 Integrated Device Technology, Inc.  
DSC 3190/11  

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