Datasheet > 6ED003L0X-F2

6ED003L0X-F2

更新时间： 2022-02-26 12:52:04

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
20页	746K
描述
High voltage gate driver IC

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数据手册

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6ED003L0X-F2 数据手册

EiceDRIVER™

6ED003L06-F2, 6ED003L02-F2

Pin configuration, description, and functionality

VCC

VB1 28

HO1 27

VS1 26

HIN1

HIN2

HIN3

LIN1

VB2 24

HO2 23

VS2 22

LIN2

LIN3

FAULT

ITRIP

VB3 20

HO3 19

VS3 18

10 EN

11 RCIN

12 VSS

13 COM

14 LO3

LO1 16

LO2 15

Figure 3

Pin Configuration of 6ED003L06-F2 and 6ED003L02-F2

Table 2

Symbol

VCC

Pin Description

Description

Low side power supply

Logic ground

VSS

/HIN1,2,3

/LIN1,2,3

/FAULT

High side logic input

Low side logic input

Indicates over-current and under-voltage (negative logic, open-drain output)

Enable I/O functionality (positive logic)

ITRIP

Analog input for over-current shut down, activates FAULT and RCIN to VSS

External RC-network to define FAULT clear delay after FAULT-Signal (T_FLTCLR

Low side gate driver reference

RCIN

)

COM

VB1,2,3

HO1,2,3

VS1,2,3

LO1,2,3

High side positive power supply

High side gate driver output

High side negative power supply

Low side gate driver output

Not connected

3.1

Low Side and High Side Control Pins (Pin 2, 3, 4, 5, 6, 7)

The Schmitt trigger input threshold of them are such to guarantee LSTTL and CMOS compatibility down to 3.3 V

controller outputs. Input Schmitt trigger and noise filter provide beneficial noise rejection to short input pulses

according to Figure 4 and Figure 5.

Vcc

Schmitt-Trigger

INPUT NOISE

FILTER

HINx

LINx

U_Z=10.5V

SWITCH LEVEL

V_IH; V_IL

Figure 4

Input pin structure

datasheet

<Revision 2.8>, 05.08.2016

1...4 5 678 9 10...20

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