Freescale Semiconductor, Inc.
MC68HC705L5
A.15.3 3.3-Volt DC Ele c tric a l Cha ra c te ristic s
(1)
Symbol
Min
Typ
Max
Unit
Characteristic
Output voltage
I
I
= 10.0 µA
= –10.0 µA
V
—
—
—
0.1
—
V
Load
Load
OL
V
V
V
–0.1
OH
DD
Output high voltage (V = 3.5 V)
(I
PE0–PE7
DD
= –0.4 mA) PA0–PA7, PC0–PC5, PD1–PD7,
V
–0.8
—
—
—
V
V
Load
OH
DD
Output low voltage (V = 3.5 V)
(I
DD
= 0.8 mA) PA0–PA7, PC0–PC5, PD1–PD7,
V
—
0.4
Load
OL
PE0–PE7
Input high voltage
PA0–PA7, PB0–PB7, PC0–PC7, RESET, OSC1, XOSC1
V
0.8 x V
—
—
V
DD
V
V
IH
DD
Input low voltage
PA0–PA7, PB0–PB7, PC0–PC7, RESET, OSC1, XOSC1
V
V
0.2 x V
DD
IL
SS
(2), (3), (4), (5)
Supply current
Run (f = 1.0 MHz)
—
—
1.8
0.8
8.0
5.0
mA
mA
OP
Wait (f = 1.0 MHz)
OP
I
DD
Stop
No clock
—
—
2.0
8.0
10.0
—
µA
µA
o
XOSC = 32.768 kHz, V = 3.0 V, T = +25 C
DD
A
(6)
Input current (with pullups disabled)
PA0–PA7, PB0–PB7, PC0–PC7, RESET, OSC1, XOSC1
I
I
—
—
± 1.0
µA
In
In
(6)
Input current (with pullups enabled, V = 3.3 V)
DD
PA0–PA7
PB0–PB7
PC0–PC7
20
20
60
80
80
300
230
230
760
µA
µA
µA
LCD pin output impedance
FP0–FP26
BP0–BP3
Zo, FP
Zo, BP
—
—
10
5
20
18
kΩ
kΩ
1. +3.0 ≤ VDD < +4.5 Vdc, VSS = 0 Vdc, TL ≤ TA ≤ TH, unless otherwise noted. All values shown reflect average measurements.
Typical values at midpoint of voltage range, 25 °C only.
2. Run (Operating) IDD, wait IDD; measured using external square wave clock source (fOSC = 2.0 MHz); all inputs 0.2 V from rail
(VSS or VDD); no dc loads; less than 50 pF on all outputs; CL = 20 pF on OSC2
3. Wait, stop IDD; all ports configured as inputs; VIL = 0.2 V; VIH = VDD –0.2 V
4. Stop IDD measured with OSC1 = VSS
.
5. Wait IDD is affected linearly by the OSC2 capacitance.
6. Input current measured with output transistor turned off and VIn = 0 V.
General Release Specification
MC68HC(7)05L5 — Rev. 2.0
MOTOROLA
196
MC68HC705L5
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