5秒后页面跳转
5V49EE502 PDF预览

5V49EE502

更新时间: 2024-02-05 07:43:27
品牌 Logo 应用领域
艾迪悌 - IDT 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
34页 386K
描述
EEPROM PROGRAMMABLE CLOCK GENERATOR

5V49EE502 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:VFQFPN
包装说明:HVQCCN,针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:7.52
Samacsys Description:VFQFP-N 4MM X 4MM X 0.9 MM MM- NO LEAD系列:5V
输入调节:MUXJESD-30 代码:S-XQCC-N24
JESD-609代码:e3长度:4 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:24实输出次数:5
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.075 ns
座面最大高度:1 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4 mm
最小 fmax:500 MHzBase Number Matches:1

5V49EE502 数据手册

 浏览型号5V49EE502的Datasheet PDF文件第3页浏览型号5V49EE502的Datasheet PDF文件第4页浏览型号5V49EE502的Datasheet PDF文件第5页浏览型号5V49EE502的Datasheet PDF文件第7页浏览型号5V49EE502的Datasheet PDF文件第8页浏览型号5V49EE502的Datasheet PDF文件第9页 
5V49EE502  
EEPROM PROGRAMMABLE CLOCK GENERATOR  
XTAL load cap = 3.5pF + XTAL[4:0] * 0.125pF (Eq. 1)  
Reference Clock Input Pins and  
Selection  
Parameter  
Bits  
Step (pF)  
Min (pF)  
Max (pF)  
The 5V49EE502 supports up to two clock inputs. One of the  
clock inputs (XIN/ REF) can be driven by either an external  
crystal or a reference clock. The second clock input (CLKIN)  
can only be driven from an external reference clock. The  
CLKSEL pin selects the input clock from either XTAL/REF or  
CLKIN.  
XTAL  
8
0.125  
0
4
When using an external reference clock instead of a crystal  
on the XTAL/REF pin, the input load capacitors may be  
completely bypassed. This allows for the input frequency to  
be up to 200MHz. When using an external reference clock,  
the XOUT pin must be left floating, XTAL must be  
programmed to the default value of “00h”, and the crystal  
drive strength bit, XDRV (0x06), must be set to the default  
value of “11h”.  
Either clock input can be set as the primary clock. The  
primary clock designation is to establish which is the main  
reference clock to the PLLs. The non-primary clock is  
designated as the secondary clock in case the primary clock  
goes absent and a backup is needed. The PRIMSRC bit  
(0xBE through 0xC3) determines which clock input will be  
selected as primary clock. When PRIMSRC bit is “0”,  
XIN/REF is selected as the primary clock, and when “1”,  
CLKIN as the primary clock.  
Switchover Modes  
The 5V49EE502 features redundant clock inputs which  
supports both Automatic and Manual switchover mode.  
These two modes are determined by the configuration bits,  
SM (0xBE through 0xC3). The primary clock source can be  
programmed, via the PRIMSRC bit, to be either XIN/REF or  
CLKIN. The other clock input will be considered as the  
secondary source. Note that the switchover modes are  
asynchronous. If the reference clocks are directly routed to  
OUTx with no phase relationship, short pulses can be  
generated during switchover. The automatic switchover  
mode will work only when the primary clock source is  
XIN/REF. Switchover modes are not supported for crystal  
input configurations.  
The two external reference clocks can be manually selected  
using the CLKSEL pin. The SM bits (0xBE through 0xC3)  
must be set to "0x" for manual switchover which is detailed  
in SWITCHOVER MODES section.  
Crystal Input (XIN/REF)  
The crystal used should be a fundamental mode quartz  
crystal; overtone crystals should not be used.  
When the XIN/REF pin is driven by a crystal, it is important  
to set the internal inverter oscillator drive strength and  
tuning/load capacitor values correctly to achieve the best  
clock performance. These values are programmable  
Manual Switchover Mode  
When SM[1:0] is "0x", the redundant inputs are in manual  
switchover mode. In this mode, CLKSEL pin is used to  
switch between the primary and secondary clock sources.  
As previously mentioned, the primary and secondary clock  
source setting is determined by the PRIMSRC bit. During  
the switchover, no glitches will occur at the output of the  
device, although there may be frequency and phase drift,  
depending on the exact phase and frequency relationship  
between the primary and secondary clocks.  
2
through I C interface to allow for maximum compatibility  
with crystals from various manufacturers, processes,  
performances, and qualities. The internal load capacitors  
are true parallel-plate capacitors for ultra-linear  
performance. Parallel-plate capacitors were chosen to  
reduce the frequency shift that occurs when non-linear load  
capacitance interacts with load, bias, supply, and  
temperature changes. External non-linear crystal load  
capacitors should not be used for applications that are  
sensitive to absolute frequency requirements. The value of  
the internal load capacitors are determined by XTAL[4:0]  
bits. The load capacitance can be set with a resolution of  
0.125pF for a total crystal load ranging from 3.5pF to 7.5pF.  
Check with the crystal vendor's load capacitance  
specification for the exact setting to tune the internal load  
capacitor. The following equation governs how the total  
internal load capacitance is set.  
Automatic Switchover Mode  
The redundant inputs are in automatic switchover mode.  
Automatic switchover mode has revertive functionality. The  
input clock selection will switch to the secondary clock  
source when there are no transitions on the primary clock  
source for two secondary clock cycles. If both reference  
clocks are at different frequencies, the device will always  
remain on the primary clock unless it is absent for two  
secondary clock cycles. The secondary clock must always  
run at a frequency less than or equal to the primary clock  
frequency.  
IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR  
6
5V49EE502  
JUNE 18, 2018  

与5V49EE502相关器件

型号 品牌 描述 获取价格 数据表
5V49EE502NLGI IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格

5V49EE502NLGI8 IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格

5V49EE503NLGI IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格

5V49EE503NLGI8 IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格

5V49EE504NLGI IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格

5V49EE504NLGI8 IDT EEPROM PROGRAMMABLE CLOCK GENERATOR

获取价格