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5V41065PGG PDF预览

5V41065PGG

更新时间: 2024-11-24 12:52:47
品牌 Logo 应用领域
艾迪悌 - IDT 输出元件PC
页数 文件大小 规格书
12页 133K
描述
2 OUTPUT PCIE GEN1/2 SYNTHESIZER

5V41065PGG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.26
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm湿度敏感等级:1
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大压摆率:85 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

5V41065PGG 数据手册

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DATASHEET  
2 OUTPUT PCIE GEN1/2 SYNTHESIZER  
IDT5V41065  
Recommended Applications  
Features/Benefits  
2 Output synthesizer for PCIe Gen1/2 and Ethernet  
16-pin TSSOP package; small board footprint  
Spread-spectrum capable; reduces EMI  
General Description  
Outputs can be terminated to LVDS; can drive a wider  
variety of devices  
The IDT5V41065 is a PCIe Gen2 compliant spread  
spectrum capable clock generator. The device has 2  
differential HCSL outputs and can be used in  
25 MHz, 125 MHz and 200 MHz output frequencies;  
supports Ethernet applications  
communication or embedded systems to subtantially  
reduce electro-magnetic interference (EMI). The spread  
amount and output frequency are selectable via select pins.  
The IDT5V41065 can also supply 25 MHz, 125 MHz and  
200 MHz outputs for applications such as Ethernet.  
OE control pin; greater system power management  
Spread% and frequency pin selection; no software  
required to configure device  
Industrial temperature range available; supports  
demanding embedded applications  
For PCIe Gen3 applications, see the 5V41235  
Output Features  
2 - 0.7V current mode differential HCSL output pairs  
Key Specifications  
Cycle-to-cycle jitter < 100 ps  
Output-to-output skew < 50 ps  
PCIe Gen2 phase jitter < 3.0ps RMS  
Block Diagram  
VDD  
2
SS1:SS0  
S1:S0  
CLK0  
CLK0  
2
2
Control  
Logic  
Phase Lock Loop  
CLK1  
CLK1  
X1/ICLK  
Clock  
Buffer/  
Crystal  
Oscillator  
25 MHz  
crystal or clock  
X2  
2
GND  
Optional tuning crystal  
capacitors  
Rr(IREF)  
OE  
IDT® 2 OUTPUT PCIE GEN1/2 SYNTHESIZER  
1
IDT5V41065 REV E 112111  

5V41065PGG 替代型号

型号 品牌 替代类型 描述 数据表
5V41065PGGI8 IDT

完全替代

2 OUTPUT PCIE GEN1/2 SYNTHESIZER
5V41065PGG8 IDT

完全替代

2 OUTPUT PCIE GEN1/2 SYNTHESIZER
5V41065PGGI IDT

完全替代

TSSOP-16, Tube

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