Datasheet > 5P83904PGGK8

5P83904PGGK8

更新时间： 2022-02-26 09:29:05

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
18页	373K
描述
High-Performance 1.8V/2.5V/3.3V Crystal Input to LVCMOS Clock Fanout Buffer

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5P83904PGGK8 数据手册

5P8390x DATASHEET

AC Electrical Characteristics

(VDD = 1.8V, 2.5V, 3.3V)

VDD = 1.8V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise

Parameter

Input Frequency

Symbol

Conditions

Input Frequency Crystal

Input Frequency Clock

Min.

Typ.

Max. Units

f_MAX

200

MHz

Delay for Output Enable / Disable

Time ENABLEx to BCLKn

t_{EN / DIS}

cycles

Duty Cycle

t_DC

Output to Output Skew

Phase Noise

t_SKEWO-O

Φnoise f_OUT= 25 MHz 100 Hz off Carrier

f_OUT= 25 MHz 1 kHz off Carrier

-121.1974

-132.1742

-143.8058

-155.2978

0.279

dBc/Hz

f_OUT= 25 MHz 10 kHz off Carrier

f_OUT= 25 MHz 100 kHz off Carrier

RMS Phase Jitter

t_JIT(Φ)

t_{R / F}

25MHz carrier, Integration Range: 12kHz-20MHz

20% to 80%

Output Rise/Fall Time

Device to Device Skew

Propagation Delay

0.95

200

freq, LVCMOS INPUT

2.5

3.1

VDD = 2.5 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise

Parameter

Input Frequency

Symbol

Conditions

Input Frequency Crystal

Input Frequency Clock

Min.

Typ.

Max. Units

f_MAX

200

MHz

Delay for Output Enable / Disable

Time ENABLEx to BCLKn

t_{EN / DIS}

cycles

Duty Cycle

t_DC

Output to Output Skew

Phase Noise

t_SKEWO-O

Φnoise f_OUT= 25 MHz 100 Hz off Carrier

f_OUT= 25 MHz 1 kHz off Carrier

-131.26

-139.2177

-149.5185

-158.7531

0.2

dBc/Hz

f_OUT= 25 MHz 10 kHz off Carrier

f_OUT= 25 MHz 100 kHz off Carrier

RMS Phase Jitter

t_JIT(Φ)

t_{R / F}

25MHz carrier, Integration Range: 12kHz-20MHz

20% to 80%

Output Rise/Fall Time

Device to Device Skew

Propagation Delay

0.9

200

freq, LVCMOS INPUT

2.5

3.6

VDD = 3.3 V ±5%, Ambient Temperature -40° to +105°C, unless stated otherwise

Parameter

Input Frequency

Symbol

Conditions

Input Frequency Crystal

Input Frequency Clock

Min.

Typ.

Max. Units

f_MAX

200

MHz

Delay for Output Enable / Disable

Time ENABLEx to BCLKn

t_{EN / DIS}

cycles

Duty Cycle

t_DC

Output to Output Skew

t_SKEWO-O

OCTOBER 5, 2016

HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE

1...4 5 678 9 10...18

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