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5P49V5907ADDDNDGI PDF预览

5P49V5907ADDDNDGI

更新时间: 2024-02-17 22:48:31
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
30页 424K
描述
Processor Specific Clock Generator

5P49V5907ADDDNDGI 技术参数

生命周期:Obsolete包装说明:VFQFPN-40
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.74
JESD-30 代码:S-XQCC-N40长度:5 mm
端子数量:40最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:350 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
主时钟/晶体标称频率:25 MHz座面最大高度:1 mm
最大供电电压:1.89 V最小供电电压:1.71 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

5P49V5907ADDDNDGI 数据手册

 浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第2页浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第3页浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第4页浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第6页浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第7页浏览型号5P49V5907ADDDNDGI的Datasheet PDF文件第8页 
5P49V5907 DATASHEET  
You can write the following equations for the total capacitance  
at each crystal pin:  
Crystal Input (XIN/REF)  
The crystal used should be a fundamental mode quartz  
crystal; overtone crystals should not be used.  
C
C
= Ci + Cs + Ce  
1 1 1  
XIN  
= Ci + Cs + Ce  
XOUT  
2
2
2
A crystal manufacturer will calibrate its crystals to the nominal  
frequency with a certain load capacitance value. When the  
oscillator load capacitance matches the crystal load  
capacitance, the oscillation frequency will be accurate. When  
the oscillator load capacitance is lower than the crystal load  
capacitance, the oscillation frequency will be higher than  
nominal and vice versa so for an accurate oscillation  
frequency you need to make sure to match the oscillator load  
capacitance with the crystal load capacitance.  
Ci and Ci are the internal, tunable capacitors. Ci and Cs  
2
are stray capacitances at each crystal pin and typical values  
are between 1pF and 3pF.  
1
2
1
Ce and Ce are additional external capacitors that can be  
1
2
added to increase the crystal load capacitance beyond the  
tuning range of the internal capacitors. However, increasing  
the load capacitance reduces the oscillator gain so please  
consult the factory when adding Ce and/or Ce to avoid  
1
2
crystal startup issues. Ce and Ce can also be used to adjust  
for unpredictable stray capacitance in the PCB.  
To set the oscillator load capacitance there are two tuning  
capacitors in the IC, one at XIN and one at XOUT. They can  
be adjusted independently but commonly the same value is  
used for both capacitors. The value of each capacitor is  
composed of a fixed capacitance amount plus a variable  
capacitance amount set with the XTAL[5:0] register.  
Adjustment of the crystal tuning capacitors allows for  
maximum flexibility to accommodate crystals from various  
manufacturers. The range of tuning capacitor values available  
are in accordance with the following table.  
1
2
The final load capacitance of the crystal:  
CL = C  
× C  
/ (C  
+ C  
)
XOUT  
XIN  
XOUT  
XIN  
For most cases it is recommended to set the value for  
capacitors the same at each crystal pin:  
C
= C  
= Cx CL = Cx / 2  
XOUT  
XIN  
The complete formula when the capacitance at both crystal  
pins is the same:  
XTAL[5:0] Tuning Capacitor Characteristics  
CL = (9pF + 0.5pF × XTAL[5:0] + Cs + Ce) / 2  
Parameter  
Bits  
Step (pF)  
Min (pF)  
Max (pF)  
Example 1: The crystal load capacitance is specified as 8pF  
and the stray capacitance at each crystal pin is Cs=1.5pF.  
Assuming equal capacitance value at XIN and XOUT, the  
equation is as follows:  
XTAL  
6
0.5  
9
25  
The capacitance at each crystal pin inside the chip starts at  
9pF with setting 000000b and can be increased up to 25pF  
with setting 111111b. The step per bit is 0.5pF.  
8pF = (9pF + 0.5pF × XTAL[5:0] + 1.5pF) / 2 →  
0.5pF × XTAL[5:0] = 5.5pF XTAL[5:0] = 11 (decimal)  
You can write the following equation for this capacitance:  
Ci = 9pF + 0.5pF × XTAL[5:0]  
Example 2: The crystal load capacitance is specified as 12pF  
and the stray capacitance Cs is unknown. Footprints for  
external capacitors Ce are added and a worst case Cs of 5pF  
is used. For now we use Cs + Ce = 5pF and the right value for  
Ce can be determined later to make 5pF together with Cs.  
The PCB where the IC and the crystal will be assembled adds  
some stray capacitance to each crystal pin and more  
capacitance can be added to each crystal pin with additional  
external capacitors.  
12pF = (9pF + 0.5pF × XTAL[5:0] + 5pF) / 2 →  
XTAL[5:0] = 20 (decimal)  
REVISION B 07/13/15  
5
PROGRAMMABLE CLOCK GENERATOR  

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