Programmable Clock Generator
5P49V5908
DATASHEET
Description
Features
The 5P49V5908 is a programmable clock generator intended
for high performance consumer, networking, industrial,
computing, and data-communications applications.
Configurations may be stored in on-chip One-Time
• Generates up to four independent output frequencies with a
total of 11 differential outputs and one reference output
• Supports multiple differential output I/O standards:
– Three universal outputs pairs with each configurable
as one differential output pair (LVDS, LVPECL or
regular HCSL) or two LVCMOS outputs. Frequency
of each output pair can be individually programmed
2
Programmable (OTP) memory or changed using I C
interface. This is IDTs fifth generation of programmable clock
®
technology (VersaClock 5).
The frequencies are generated from a single reference clock
or crystal. Two select pins allow up to 4 different
– Eight copies of Low Power HCSL(LP-HCSL) outputs.
Programmable frequency
configurations to be programmed and accessible using
processor GPIOs or bootstrapping. The different selections
may be used for different operating modes (full function,
partial function, partial power-down), regional standards (US,
Japan, Europe) or system production margin testing.
– See Output Features and Descriptions for details
• One reference LVCMOS output clock
• High performance, low phase noise PLL, <0.7 ps RMS
typical phase jitter on outputs:
2
The device may be configured to use one of two I C
– PCIe Gen1, 2, 3 compliant clock capability
– USB 3.0 compliant clock capability
– 1 GbE and 10 GbE
addresses to allow multiple devices to be used in a system.
Pin Assignment
• Four fractional output dividers (FODs)
• Independent Spread Spectrum capability from each
fractional output divider (FOD)
• Four banks of internal non-volatile in-system
programmable or factory programmable OTP memory
2
• I C serial programming interface
• Input frequency ranges:
48 47 46 45 44 43
42 41 40 39 38 37
1
2
VDDO2
36
35
34
33
32
– LVCMOS Reference Clock Input (XIN/REF) – 1MHz
to 200MHz
OUT10B
OUT2
XOUT
XIN/REF
VDDA
OUT2B
3
4
– Crystal frequency range: 8MHz to 40MHz
OEB7_10
NC
• Output frequency ranges:
5
6
7
VDDO
– LVCMOS Clock Outputs – 1MHz to 200MHz
31
30
VDD
VDD_CORE
OUT9
OUT9B
EPAD
– LP-HCSL Clock Outputs – 1MHz to 200MHz
29
28
27
26
OUT3
OUT3B
VDDO
NC
OUT8
OUT8B
OUT7
8
9
– Other Differential Clock Outputs – 1MHz to 350MHz
• Programmable loop bandwidth
• Programmable crystal load capacitance
• Power-down mode
• Mixed voltage operation:
– 1.8V core
10
11
12
OUT7B
SD/OE
25
NC
14
19 20
21 22 23 24
15 16 17 18
13
– 1.8V VDDO for 8 LP-HCSL outputs
– 1.8V to 3.3V VDDO for other outputs
(3 programmable differential outputs and 1 reference
output)
48-pin VFQFPN
– See Pin Descriptions for details
• Available in 48-pin VFQFPN package (NDG48)
• -40° to +85°C industrial temperature operation
5P49V5908 NOVEMBER 11, 2016
1
©2015 Integrated Device Technology, Inc.
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