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5P49EE502NDGI8 PDF预览

5P49EE502NDGI8

更新时间： 2024-02-20 11:35:23
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路PC
页数 文件大小 规格书
26页 233K
描述
VERSACLOCK? LOW POWER CLOCK GENERATOR IDT5P49EE502

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5P49EE502NDGI8 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Not Recommended零件包装代码：VFQFPN
包装说明：HVQCCN, LCC20,.11SQ,16针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.31
Samacsys Confidence：3Samacsys Status：Released
2D Presentation：https://componentsearchengine.com/2D/0T/11129317.2.1.pngSchematic Symbol：https://componentsearchengine.com/symbol.php?partID=11129317
PCB Footprint：https://componentsearchengine.com/footprint.php?partID=111293173D View：https://componentsearchengine.com/viewer/3D.php?partID=11129317
Samacsys PartID：11129317Samacsys Image：https://componentsearchengine.com/Images/9/5P49EE502NDGI8.jpg
Samacsys Thumbnail Image：https://componentsearchengine.com/Thumbnails/2/5P49EE502NDGI8.jpgSamacsys Pin Count：21
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Quad Flat No-Lead
Samacsys Footprint Name：NDG20P2*Samacsys Released Date：2020-01-28 12:12:00
Is Samacsys：NJESD-30 代码：S-XQCC-N20
JESD-609代码：e3长度：3 mm
湿度敏感等级：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
最大输出时钟频率：120 MHz封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC20,.11SQ,16
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：260电源：1.8 V
主时钟/晶体标称频率：40 MHz认证状态：Not Qualified
座面最大高度：1 mm子类别：Clock Generators
最大供电电压：1.98 V最小供电电压：1.62 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.4 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：3 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, VIDEOBase Number Matches：1

5P49EE502NDGI8 数据手册

 浏览型号5P49EE502NDGI8的Datasheet PDF文件第2页浏览型号5P49EE502NDGI8的Datasheet PDF文件第3页浏览型号5P49EE502NDGI8的Datasheet PDF文件第4页浏览型号5P49EE502NDGI8的Datasheet PDF文件第6页浏览型号5P49EE502NDGI8的Datasheet PDF文件第7页浏览型号5P49EE502NDGI8的Datasheet PDF文件第8页 
IDT5P49EE502  
VERSACLOCK® LOW POWER CLOCK GENERATOR  
EEPROM CLOCK GENERATOR  
PLL Features and Descriptions  
8-bit  
D
VCO  
1-bit 11-bit  
A
M
PLL Block Diagram  
Ref-Divider  
(D) Values  
Feedback  
Pre-Divider  
(XDIV)  
Feedback  
Programmable  
Spread Spectrum  
(M) Values Loop Bandwidth Generation Capability  
Values  
1
PLLA  
PLLB  
PLLC  
1 - 255  
1 - 255  
1 - 255  
1 or 4  
6 - 2047  
6 - 2047  
6 - 2047  
Yes  
Yes  
Yes  
No  
Yes  
No  
4
1 or 8 bit  
2
divide  
1
PLLD  
1 - 255  
1 or 4  
6 - 2047  
Yes  
No  
1.XDIVA or XDIVD=0, A=1. XDIVA or XDIVD=1, A=4.  
2.XDIVC =0, A=1. XDIVC=1 turns on 8 bit predivide multiplier, A=FBC2[7:0]. Total feedback divide equals FBC[10:0]  
*FBC2[7:0].  
Crystal Input (XIN/REF)  
Reference Pre-Divider, Reference Divider,  
Feedback-Divider and Post-Divider  
The crystal oscillators should be fundamental mode quartz  
crystals; overtone crystals are not suitable. Crystal  
frequency should be specified for parallel resonance with  
50Ω maximum equivalent series resonance.  
Each PLL incorporates an 8-bit reference-scaler and a  
11-bit feedback divider which allows the user to generate  
four unique non-integer-related frequencies. PLLA and  
PLLD each have a feedback pre-divider that provides  
additional multiplication for kHz reference clock  
applications. Each output divider supports 8-bit post-divider.  
The following equation governs how the output frequency is  
calculated.  
Crystal Load Capacitors  
The device crystal connections should include pads for  
small capacitors from X1 to ground and from X2 to ground.  
These capacitors are used to adjust the stray capacitance of  
the board to match the nominally required crystal load  
capacitance. Because load capacitance can only be  
increased in this trimming process, it is important to keep  
stray capacitance to a minimum by using very short PCB  
traces (and no vias) between the crystal and device. Crystal  
capacitors must be connected from each of the pins X1 and  
X2 to ground.  
A*M  
D
F *  
=
FOUT  
( )  
IN  
(Eq. 2)  
ODIV  
Where F is the reference frequency, A is the feedback  
IN  
pre-divider value, M is the feedback-divider value, D is the  
reference divider value, ODIV is the total post-divider value,  
and F  
is the resulting output frequency. Programming  
OUT  
The crystal cpacitors are internal to the device and have an  
effective value of 8pF.  
any of the dividers may cause glitches on the outputs.  
®
IDT® VERSACLOCK LOW POWER CLOCK GENERATOR  
5
IDT5P49EE502  
REV D 072610  
12345678...26

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