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5P49EE502NDGI8 PDF预览

5P49EE502NDGI8

更新时间： 2024-02-21 11:45:57
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路PC
页数 文件大小 规格书
26页 233K
描述
VERSACLOCK? LOW POWER CLOCK GENERATOR IDT5P49EE502

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5P49EE502NDGI8 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Not Recommended零件包装代码：VFQFPN
包装说明：HVQCCN, LCC20,.11SQ,16针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.31
Samacsys Confidence：3Samacsys Status：Released
2D Presentation：https://componentsearchengine.com/2D/0T/11129317.2.1.pngSchematic Symbol：https://componentsearchengine.com/symbol.php?partID=11129317
PCB Footprint：https://componentsearchengine.com/footprint.php?partID=111293173D View：https://componentsearchengine.com/viewer/3D.php?partID=11129317
Samacsys PartID：11129317Samacsys Image：https://componentsearchengine.com/Images/9/5P49EE502NDGI8.jpg
Samacsys Thumbnail Image：https://componentsearchengine.com/Thumbnails/2/5P49EE502NDGI8.jpgSamacsys Pin Count：21
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Quad Flat No-Lead
Samacsys Footprint Name：NDG20P2*Samacsys Released Date：2020-01-28 12:12:00
Is Samacsys：NJESD-30 代码：S-XQCC-N20
JESD-609代码：e3长度：3 mm
湿度敏感等级：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
最大输出时钟频率：120 MHz封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC20,.11SQ,16
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：260电源：1.8 V
主时钟/晶体标称频率：40 MHz认证状态：Not Qualified
座面最大高度：1 mm子类别：Clock Generators
最大供电电压：1.98 V最小供电电压：1.62 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.4 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：3 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, VIDEOBase Number Matches：1

5P49EE502NDGI8 数据手册

 浏览型号5P49EE502NDGI8的Datasheet PDF文件第3页浏览型号5P49EE502NDGI8的Datasheet PDF文件第4页浏览型号5P49EE502NDGI8的Datasheet PDF文件第5页浏览型号5P49EE502NDGI8的Datasheet PDF文件第7页浏览型号5P49EE502NDGI8的Datasheet PDF文件第8页浏览型号5P49EE502NDGI8的Datasheet PDF文件第9页 
IDT5P49EE502  
VERSACLOCK® LOW POWER CLOCK GENERATOR  
EEPROM CLOCK GENERATOR  
Modulation frequency:  
SPREAD SPECTRUM GENERATION  
(PLLB)  
F
= F  
/ NC (Eq. 11)  
MOD  
MID  
PLLB has spread spectrum generation capability, which  
users have the option of turning on and off. Spread  
spectrum profile, frequency, and spread are fully  
programmable (within limits). The programmable spread  
spectrum generation parameters are NC[10:0], MOD[12:0],  
and NSS[10:0] bits. To enable spread spectrum, set  
SSENB_B=0.  
Video Example  
F
= 27 MHz, F  
= 27 MHz, 640 pixels per line, center  
OUT  
REF  
spread of 1%. Using F  
spread spectrum register settings.  
=432MHz, find the necessary  
VCO  
F
= F /8  
MID  
VCO  
NC = 640 (integer number of spread periods/screen)  
MOD = (25MHz * 640)/(2 * 54MHz) = 160  
The spread spectrum circuitry was specifically developed to  
accommodate video display applications. The spread  
modulation frequency can be defined to exactly equal the  
horizontal line frequency (HSYNC)  
NSS = (640/2)+(640/8)*(27.27MHz-26.73MHz)/27MHz =  
321.  
NC[10:0]  
These bits are used to determine the number of pulses per  
spread spectrum cycle. For video applications, NC is the  
number of pixels on the horizontal display row (or integer  
multiple of displayed pixels in a row). By matching the  
spread period to the screen, no tearing or “shimmer” will be  
apparent.  
F
= 27MHz/640 = 11.8kHz.  
MOD  
Non-Video Example  
F
= 25MHz, F  
= 27 MHz, 31.25kHz modulation rate,  
OUT  
REF  
center spread of 1%. Find the necessary spread spectrum  
register settings.  
NC must be an even number to insure that the upward  
spread transition has the same number of steps as the  
downward spread transition.  
F
F
= F  
/ 8  
VCO  
MID  
= 31.25kHz = 50.625MHz/NC.  
MOD  
For non-video applications, this can also be seen as the  
number of clock cycles for a complete spread spectrum  
period.  
NC = 1620  
MOD = (25MHz * 1620)/(2 * 50.625MHz) = 400  
MOD[12:0]  
NSS = (1620/2)+(1620/8)*(27.27MHz-26.73MHz)/27MHz =  
814.  
These bits relate the VCO frequency to the target average  
spread output frequency (F ).  
MID  
F
F
F
= (F  
) / 8  
VCO  
MID  
MAX  
MIN  
= F  
+ (SS% * F  
MID)  
MID  
MID  
= F  
- (SS% * F  
MID)  
MOD = (F  
* NC) / (2 * F  
)
REF  
MID  
NSS[10:0]  
These bits control the amplitude of the spread modulation.  
NSS = (NC / 2) + (NC / 8) * (F  
- F ) / F  
MIN MID  
MAX  
®
IDT® VERSACLOCK LOW POWER CLOCK GENERATOR  
6
IDT5P49EE502  
REV D 072610  
1...3456789...26

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