Datasheet > 5CEFA7F23A7N

5CEFA7F23A7N

更新时间： 2023-01-03 03:33:09

品牌	Logo	应用领域
英特尔 - INTEL		栅
页数	文件大小	规格书
64页	1355K
描述
Field Programmable Gate Array, PBGA484, ROHS COMPLIANT, FBGA-484

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5CEFA7F23A7N 数据手册

Page 58

Glossary

Table 63 lists the glossary for this datasheet.

Table 63. Glossary Table (Part 1 of 4)

Letter

Subject

Definitions

—

Receiver Input Waveforms

Single-Ended Waveform

Positive Channel (p) = V

Negative Channel (n) = V

Ground

Differential Waveform

p − n = 0 V

Differential I/O

Standards

Transmitter Output Waveforms

Single-Ended Waveform

Positive Channel (p) = V

Negative Channel (n) = V

Ground

Differential Waveform

p − n = 0 V

—

f_HSCLK

Left/right PLL input clock frequency.

High-speed I/O block—Maximum/minimum LVDS data transfer rate

(f_HSDR= 1/TUI).

f_HSDR

—

Cyclone V Device Datasheet

December 2013 Altera Corporation

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型号	品牌	描述	获取价格	数据表
5CEFA7F23C7N	INTEL	Field Programmable Gate Array, 149500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484	获取价格
5CEFA7F23C8	INTEL	Field Programmable Gate Array, PBGA484, FBGA-484	获取价格
5CEFA7F23C8N	INTEL	Field Programmable Gate Array, 149500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484	获取价格
5CEFA7F23I7N	ALTERA	Cyclone V Device Datasheet	获取价格
5CEFA7F23I7N	INTEL	Field Programmable Gate Array, 149500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484	获取价格
5CEFA7F27C6	INTEL	Field Programmable Gate Array, PBGA672, FBGA-672	获取价格