ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH
where D is the percent of on time during a switching
cycle. Setting Q = 1 and solving for Se yields
Equation 10:
RTCT signal with the current sense feedback and applies
the result to the CS pin as shown in Figure 6.
1
π
1
⎛⎛
⎝⎝
⎞
⎞
– 1
(EQ. 10)
--
-------------
S
= S
+ 0.5
e
n
⎠
⎠
1 – D
V
REF
Since Sn and Se are the on time slopes of the current
ramp and the external ramp, respectively, they can be
R9
R6
multiplied by t
to obtain the voltage change that
.
ON
CS
occurs during t
ON
1
π
1
RTCT
⎛⎛
⎝⎝
⎞
⎞
– 1
--
-------------
V
= V
+ 0.5
(EQ. 11)
e
n
⎠
⎠
1 – D
C4
where V is the change in the current feedback signal
n
(ΔI) during the on time and Ve is the voltage that must
be added by the external ramp.
FIGURE 6. SLOPE COMPENSATION
For a flyback converter, Vn can be solved for in terms of
input voltage, current transducer components, and
primary inductance, yielding Equation 12:
Assuming the designer has selected values for the RC
filter (R and C ) placed on the CS pin, the value of R
6
4
9
required to add the appropriate external ramp can be
found by superposition.
D ⋅ T
⋅ V ⋅ R
IN CS
1
π
1
SW
⎛⎛
⎞
⎞
– 1
---------------------------------------------------- --
-------------
V
=
+ 0.5
V
e
⎝⎝
⎠
⎠
(EQ. 12)
L
1 – D
p
2.05D ⋅ R
6
---------------------------
(EQ. 16)
V
=
V
e
R
+ R
9
6
where R
CS
is the current sense resistor, f is the
sw
switching frequency, L is the primary inductance, V is
p
IN
The factor of 2.05 in Equation 16 arises from the peak
amplitude of the sawtooth waveform on RTCT minus a
base-emitter junction drop. That voltage multiplied by
the maximum duty cycle is the voltage source for the
the minimum input voltage, and D is the maximum duty
cycle.
The current sense signal at the end of the ON time for
CCM operation is Equation 13:
slope compensation. Rearranging to solve for R yields
9
Equation 17:
(1 – D) ⋅ V ⋅ f
sw
N
⋅ R
CS
N
P
⎛
⎜
⎝
⎞
⎟
⎠
O
(2.05D – V ) ⋅ R
S
e
6
------------------------
-------------------------------------------
V
=
I
+
O
V
(EQ. 13)
---------------------------------------------
R
=
Ω
(EQ. 17)
CS
2L
s
9
V
e
The value of R
CS
determined in Equation 15 must be
rescaled so that the current sense signal presented at the
where V
is the voltage across the current sense
resistor, L is the secondary winding inductance, and I is
CS
s
O
CS pin is that predicted by Equation 13. The divider
the output current at current limit. Equation 13 assumes
the voltage drop across the output rectifier is negligible.
created by R and R makes this necessary.
6
9
R
+ R
9
R
9
6
--------------------
R′
=
⋅ R
(EQ. 18)
Since the peak current limit threshold is 1.00V, the total
current feedback signal plus the external ramp voltage
must sum to this value when the output load is at the
current limit threshold as shown in Equation 14.
CS
CS
Example:
= 12V
V
IN
V
+ V
= 1
CS
(EQ. 14)
e
V = 48V
O
L = 800µH
s
Substituting Equations 12 and 13 into Equation 14 and
solving for R
yields Equation 15:
Ns/Np = 10
Lp = 8.0µH
CS
1
----------------------------------------------------------------------------------------------------------------------------------------------------
R
=
CS
1
π
--
⎛
+ 0.5
⎞
⎟
D ⋅ f ⋅ V
N
(1 – D) ⋅ V ⋅ f
O sw
⎛
⎜
⎝
⎞
⎟
⎠
I = 200mA
O
sw
IN
s
⎜
------------------------------- -----------------
------
-------------------------------------------
⋅
–1
+
⋅
I
+
O
⎜
⎝
⎟
⎠
L
1 – D
N
p
2L
s
p
Switching Frequency, f
sw
= 200kHz
(EQ. 15)
Duty Cycle, D = 28.6%
R = 499Ω
6
Adding slope compensation is accomplished in the
ISL7884xASRH using an external buffer transistor and
the RTCT signal. A typical application sums the buffered
Solve for the current sense resistor, R , using
CS
Equation 15.
FN6991.0
December 21, 2009
8