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5962-9957501NUB

更新时间： 2024-11-29 14:39:55
品牌 Logo 应用领域
赛灵思 - XILINX 时钟栅可编程逻辑
页数 文件大小 规格书
22页 171K
描述
Field Programmable Gate Array, 3136 CLBs, 55000 Gates, 200MHz, CMOS, PBGA432, PLASTIC, BGA-432

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5962-9957501NUB 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：LBGA,
针数：432Reach Compliance Code：unknown
ECCN代码：3A001.A.2.CHTS代码：8542.39.00.01
风险等级：5.88最大时钟频率：200 MHz
CLB-Max的组合延迟：1.3 nsJESD-30 代码：S-PBGA-B432
JESD-609代码：e0长度：40 mm
可配置逻辑块数量：3136等效关口数量：55000
端子数量：432最高工作温度：125 °C
最低工作温度：-55 °C组织：3136 CLBS, 55000 GATES
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class N
座面最大高度：1.7 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：TIN LEAD
端子形式：BALL端子节距：1.27 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：40 mmBase Number Matches：1

5962-9957501NUB 数据手册

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— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —  
0
R
QPRO XQ4000XL Series QML  
High-Reliability FPGAs  
0
2
DS029 (v2.0) March 7, 2014  
Product Specification  
•
Development system runs on most common computer  
platforms  
XQ4000X Series Features  
•
Certified to MIL-PRF-38535 Appendix A QML  
(Qualified Manufacturer Listing)  
-
-
-
Interfaces to popular design environments  
Fully automatic mapping, placement and routing  
Interactive design editor for design optimization  
•
•
Ceramic and plastic packages  
Also available under the following standard microcircuit  
drawings (SMD)  
•
•
Highest capacity—over 180,000 usable gates  
Additional routing over XQ4000E  
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XQ4013XL 5962-98513  
XQ4036XL 5962-98510  
XQ4062XL 5962-98511  
XQ4085XL 5962-99575  
-
Almost twice the routing capacity for high-density  
designs  
•
•
•
Buffered Interconnect for maximum speed  
New latch capability in configurable logic blocks  
•
For more information contact the Defense Supply  
Center Columbus (DSCC)  
Improved VersaRing™ I/O interconnect for better Fixed  
pinout flexibility  
http://www.dscc.dla.mis/v/va/smd/smdsrch.html  
-
Virtually unlimited number of clock signals  
•
•
Available in -3 speed  
•
Optional multiplexer or 2-input function generator on  
device outputs  
System featured Field-Programmable Gate Arrays  
-
SelectRAM™ memory: on-chip ultra-fast RAM with  
•
•
5V tolerant I/Os  
·
·
synchronous write option  
dual-port RAM option  
0.35 µm SRAM process  
-
-
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-
-
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Abundant flip-flops  
Introduction  
Flexible function generators  
Dedicated high-speed carry logic  
Wide edge decoders on each edge  
Hierarchy of interconnect lines  
Internal 3-state bus capability  
Eight global low-skew clock or signal distribution  
networks  
The QPRO™ XQ4000XL Series high-performance,  
high-capacity Field Programmable Gate Arrays (FPGAs)  
provide the benefits of custom CMOS VLSI, while avoiding  
the initial cost, long development cycle, and inherent risk of  
a conventional masked gate array.  
The result of thirteen years of FPGA design experience and  
feedback from thousands of customers, these FPGAs com-  
bine architectural versatility, on-chip Select-RAM memory  
with edge-triggered and dual-port modes, increased speed,  
abundant routing resources, and new, sophisticated  
soft-ware to achieve fully automated implementation of  
complex, high-density, high-performance designs.  
•
•
•
•
System performance beyond 50 MHz  
Flexible array architecture  
Low power segmented routing architecture  
Systems-oriented features  
-
IEEE 1149.1-compatible boundary scan logic  
support  
Refer to the complete Commercial XC4000XL Series Field  
Programmable Gate Arrays Data Sheet for more informa-  
tion on device architecture and timing, and the latest Xilinx  
databook for package pinouts other than the CB228  
(included in this data sheet). (Pinouts for XQ4000XL device  
are identical to XC4000XL.)  
-
-
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Individually programmable output slew rate  
Programmable input pull-up or pull-down resistors  
12 mA sink current per XQ4000XL output  
•
•
Configured by loading binary file  
Unlimited reprogrammability  
Readback capability  
-
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Program verification  
Internal node observability  
© 2000–2014 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS029 (v2.0) March 7, 2014  
www.xilinx.com  
1
Product Specification  
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5962-9957501QXB XILINX

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5962-9957501QYB XILINX

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 		IC FPGA, 3136 CLBS, 55000 GATES, 200 MHz, CQFP228, CERAMIC, QFP-228, Field Programmable Ga
5962-9957501QZB XILINX

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 		Field Programmable Gate Array, 3136 CLBs, 55000 Gates, 200MHz, CMOS, CQFP228, CERAMIC, QFP
5962-9957501QZX WEDC

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 		Field Programmable Gate Array, 3136 CLBs, 55000 Gates, 200MHz, CMOS, CQFP228, CERAMIC, QFP
5962-9957601Q2A TI

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 		2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH INTERNAL REFERENCE A
5962-9957601Q2X TI

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 		SERIAL INPUT LOADING, 3.5us SETTLING TIME, 12-BIT DAC, CQCC20, CERAMIC, LCC-20
5962-9957601QPA TI

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 		2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH INTERNAL REFERENCE A
5962-9958101QXC TI

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 		MICROCIRCUIT DATA SHEET

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