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5962-9957201QTA PDF预览

5962-9957201QTA

更新时间: 2024-01-24 04:29:06
品牌 Logo 应用领域
赛灵思 - XILINX /
页数 文件大小 规格书
31页 249K
描述
QPro Virtex 2.5V QML High-Reliability FPGAs

5962-9957201QTA 技术参数

生命周期:Active零件包装代码:QFP
包装说明:CERAMIC, QFP-228针数:228
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.39.00.01风险等级:5
CLB-Max的组合延迟:0.8 nsJESD-30 代码:S-CQFP-F228
长度:39.37 mm可配置逻辑块数量:1536
等效关口数量:322970端子数量:228
最高工作温度:125 °C最低工作温度:-55 °C
组织:1536 CLBS, 322970 GATES封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:GQFF封装形状:SQUARE
封装形式:FLATPACK, GUARD RING可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Qualified筛选级别:MIL-PRF-38535 Class Q
座面最大高度:3.302 mm最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子节距:0.635 mm端子位置:QUAD
宽度:39.37 mmBase Number Matches:1

5962-9957201QTA 数据手册

 浏览型号5962-9957201QTA的Datasheet PDF文件第8页浏览型号5962-9957201QTA的Datasheet PDF文件第9页浏览型号5962-9957201QTA的Datasheet PDF文件第10页浏览型号5962-9957201QTA的Datasheet PDF文件第12页浏览型号5962-9957201QTA的Datasheet PDF文件第13页浏览型号5962-9957201QTA的Datasheet PDF文件第14页 
R
QPro Virtex 2.5V QML High-Reliability FPGAs  
CLB Arithmetic Switching Characteristics  
Setup times not listed explicitly can be approximated by decreasing the combinatorial delays by the setup time adjustment  
listed. Precise values are provided by the timing analyzer.  
Speed Grade  
-4  
Symbol  
Description  
Min  
Max  
Units  
Combinatorial Delays  
TOPX  
TOPXB  
F operand inputs to X via XOR  
F operand input to XB output  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.0  
1.4  
2.0  
2.0  
1.5  
1.2  
2.1  
1.6  
1.1  
0.6  
0.1  
0.6  
0.6  
0.2  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
TOPY  
F operand input to Y via XOR  
F operand input to YB output  
F operand input to COUT output  
G operand inputs to Y via XOR  
G operand input to YB output  
G operand input to COUT output  
BX initialization input to COUT  
CIN input to X output via XOR  
CIN input to XB  
TOPYB  
TOPCYF  
TOPGY  
TOPGYB  
TOPCYG  
TBXCY  
TCINX  
TCINXB  
TCINY  
CIN input to Y via XOR  
TCINYB  
CIN input to YB  
TBYP  
CIN input to COUT output  
Multiplier Operation  
TFANDXB  
TFANDYB  
TFANDCY  
TGANDYB  
TGANDCY  
F1/2 operand inputs to XB output via AND  
F1/2 operand inputs to YB output via AND  
F1/2 operand inputs to COUT output via AND  
G1/2 operand inputs to YB output via AND  
G1/2 operand inputs to COUT output via AND  
-
-
-
-
-
0.5  
1.1  
0.6  
0.7  
0.2  
ns  
ns  
ns  
ns  
ns  
Setup and Hold Times before/after Clock CLK  
Setup Time / Hold Time  
TCCKX/TCKCX  
CCKY/TCKCY  
Notes:  
CIN input to FFX  
CIN input to FFY  
1.3 / 0  
1.4 / 0  
-
-
ns  
ns  
T
1. A Zero 0Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed best-case, but if  
a 0is listed, there is no positive hold time.  
DS002 (v1.5) December 5, 2001  
www.xilinx.com  
11  
Preliminary Product Specification  
1-800-255-7778  

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