R
QPRO™ XQ4000XL Series QML High-Reliability FPGAs
Table 1: XQ4000X Series High Reliability Field Progammable Gate Arrays
Max Logic Max. RAM
Gates Bits
(No RAM) (No Logic) (Logic and RAM)*
Typical Gate
Range
Logic
Cells
CLB
Matrix
Total
CLBs
Number of
Flip-Flops
Max.
User I/O
Device
Packages
XQ4013XL
XQ4036XL
XQ4062XL
XQ4085XL
2432
3078
5472
7448
13,000
36,000
62,000
85,000
18,432
41,472
73,728
100,352
10,000-30,000
22,000-65,000
40,000-130,000
55,000-180,000
24x24
36x36
48x48
56x56
576
1,536
3,168
5,376
7,168
192
288
384
448
PG223, CB228,
PQ240, BG256
1,296
2,304
3,136
PG411, CB228,
HQ240, BG352
PG475, CB228,
HQ240, BG432
PG475, CB228,
HQ240, BG432
* Maximum values of typical gate range includes 20% to 30% of CLBs used as RAM.
XQ4000XL Switching Characteristics
Definition of Terms
In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
follows:
Advance:
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or families.
Values are subject to change. Use as estimates, not for production.
Preliminary: Based on preliminary characterization. Further changes are not expected.
Unmarked: Specifications not identified as either Advance or Preliminary are to be considered final.
All specifications subject to change without notice.
Additional Specifications
Except for pin-to-pin input and output parameters, the a.c. parameter delay specifications included in this document are
derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction
temperature conditions. The parameters included are common to popular designs and typical applications. For design
considerations requiring more detailed timing information, see the appropriate family a.c. supplements available on the
Xilinx WEBLINX at http://www.xilinx.com.
Absolute Maximum Ratings
Symbol
Description
Units
V
V
Supply voltage relative to GND
-0.5 to 4.0
-0.5 to 5.5
-0.5 to 5.5
50
CC
V
Input voltage relative to GND (Note 1)
V
IN
V
Voltage applied to 3-state output (Note 1)
Longest Supply Voltage Rise Time from 1 V to 3V
Storage temperature (ambient)
V
TS
V
T
ms
°C
°C
°C
°C
CCt
-65 to +150
+260
STG
SOL
T
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
Ceramic Package
Plastic Package
+150
T
Junction temperature
J
+125
Note 1: Maximum DC overshoot or undershoot above Vcc or below GND must be limited to either 0.5 V or 10 mA, whichever is easier to
achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot to + 7.0 V, provided this over- or undershoot lasts
less than 10 ns and with the forcing current being limited to 200 mA.
Note 2: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress rat-
ings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is
not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
2
DS029 (v1.2) February 9, 2000
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