Datasheet > 5962-9089910QUA

5962-9089910QUA

更新时间： 2024-01-01 19:14:39

品牌	Logo	应用领域
其他 - ETC		闪存内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
27页	208K
描述
MICROCIRCUIT, MEMORY, DIGITAA, CMOS, 128K X 8 BIT FLASH EEPROM, MONOLITHIC SILICON

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5962-9089910QUA 技术参数

生命周期：	Active	零件包装代码：	QFJ
包装说明：	QCCN,	针数：	32
Reach Compliance Code：	unknown	ECCN代码：	3A001.A.2.C
HTS代码：	8542.32.00.51	风险等级：	5.8
Is Samacsys：	N	最长访问时间：	250 ns
JESD-30 代码：	R-CQCC-N32	JESD-609代码：	e0
内存密度：	1048576 bit	内存集成电路类型：	FLASH
内存宽度：	8	功能数量：	1
端子数量：	32	字数：	131072 words
字数代码：	128000	工作模式：	ASYNCHRONOUS
最高工作温度：	125 °C	最低工作温度：	-55 °C
组织：	128KX8	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	QCCN	封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER	并行/串行：	PARALLEL
编程电压：	12 V	认证状态：	Qualified
筛选级别：	MIL-PRF-38535 Class Q	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子面层：	TIN LEAD
端子形式：	NO LEAD	端子位置：	QUAD
Base Number Matches：	1

5962-9089910QUA 数据手册

c. Subgroup 4 (C and C

IN OUT

measurements) shall be measured only for initial qualification and after any process or

design changes which may affect input or output capacitance. Capacitance shall be measured between the

designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures and all input and

output terminals tested.

d. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,

subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in

accordance with MIL-STD-883, test method 5012 (see 1.5 herein).

e. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may

affect the performance of the device. For device class M, procedures and circuits shall be maintained under document

revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity

upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device

manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or

acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be

considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference.

f. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all

testing, the devices shall be erased and verified, (except devices submitted for groups B, C, and D testing).

4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.

4.4.2.1 Additional criteria for device class M.

a. Steady-state life test conditions, method 1005 of MIL-STD-883:

(1) The device selected for testing shall be programmed with a checkerboard pattern. After completion of all testing,

the devices shall be erased and verified (except devices submitted for group D testing).

(2) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level

control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify

the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test

method 1005.

(3)

T = +125 C, minimum.

(4) Test duration: 1,000 hours, except as specified in method 1005 of MIL-STD-883.

b. All devices requiring end-point electrical testing shall be programmed with a checkerboard or equivalent alternating bit

pattern.

c. After the completion of all testing, the devices shall be cleared and verified prior to delivery.

4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,

or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The

test circuit shall be maintained under document revision level control by the device manufacturer's TRB, in accordance with

MIL-PRF-38535, and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify

the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of

MIL-STD-883.

4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.

The devices selected for testing shall be programmed with a checkerboard pattern. After completion of all testing, the devices

shall be erased and verified.

SIZE

STANDARD

5962-90899

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

REVISION LEVEL

SHEET

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

1...18 19 202122 23 24...27

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与5962-9089910QUA相关器件

型号	品牌	描述	获取价格	数据表
5962-9089910QXA	ETC	MICROCIRCUIT, MEMORY, DIGITAA, CMOS, 128K X 8 BIT FLASH EEPROM, MONOLITHIC SILICON	获取价格
5962-9089910QYA	ETC	MICROCIRCUIT, MEMORY, DIGITAA, CMOS, 128K X 8 BIT FLASH EEPROM, MONOLITHIC SILICON	获取价格
5962-9089911MXA	ETC	x8 Flash EEPROM	获取价格
5962-9089911MXX	ETC	MICROCIRCUIT, MEMORY, DIGITAA, CMOS, 128K X 8 BIT FLASH EEPROM, MONOLITHIC SILICON	获取价格
5962-9089911MYA	ETC	x8 Flash EEPROM	获取价格
5962-9089911MYX	ETC	MICROCIRCUIT, MEMORY, DIGITAA, CMOS, 128K X 8 BIT FLASH EEPROM, MONOLITHIC SILICON	获取价格

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