CD54HC377, CD74HC377,
CD54HCT377, CD74HCT377
Data sheet acquired from Harris Semiconductor
SCHS184C
High-Speed CMOS Logic
Octal D-Type Flip-Flop With Data Enable
September 1997 - Revised February 2004
Features
Description
• Buffered Common Clock
• Buffered Inputs
The ’HC377 and ’HCT377 are octal D-type flip-flops with a
buffered clock (CP) common to all eight flip-flops. All the flip-
flops are loaded simultaneously on the positive edge of the
clock (CP) when the Data Enable (E) is Low.
[ /Title
(CD74
HC377
,
• Typical Propagation Delay at C = 15pF,
L
o
V
= 5V, T = 25 C
CC
A
Ordering Information
- 14 ns (HC Types
CD74
HCT37
7)
/Sub-
ject
(High
Speed
CMOS
Logic
Octal
D-
- 16 ns (HCT Types)
TEMP. RANGE
o
PART NUMBER
CD54HC377F3A
CD54HCT377F3A
CD74HC377E
( C)
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
• Fanout (Over Temperature Range)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
CD74HC377M
20 Ld SOIC
20 Ld SOIC
20 Ld TSSOP
20 Ld TSSOP
20 Ld PDIP
• Significant Power Reduction Compared to LSTTL
Logic ICs
CD74HC377M96
CD74HC377PW
CD74HC377PWR
CD74HCT377E
CD74HCT377M
CD74HCT377M96
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N = 30%, N = 30%of V
IL IH
at
Type
Flip-
CC
V
= 5V
CC
20 Ld SOIC
20 Ld SOIC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
NOTE: When ordering, use the entire part number. The suffixes
96 and R denote tape and reel.
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Pinout
CD54HC377, CD54HCT377
(CERDIP)
CD74HC377
(PDIP, SOIC, TSSOP)
CD74HCT377
(PDIP, SOIC)
TOP VIEW
1
2
3
4
5
6
7
8
9
V
CC
E
20
19
Q
Q
0
0
1
1
2
2
3
3
7
7
6
D
D
Q
Q
D
D
Q
18 D
17 D
16 Q
15 Q
14 D
6
5
5
4
13 D
12
Q
4
GND 10
11 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
1