Datasheet > 5962-8961701LA

5962-8961701LA

更新时间： 2024-01-10 20:31:11

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
8页	288K
描述
Microprocessor-Compatible 12-Bit D/A Converter

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

5962-8961701LA 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	1.280 X 0.310 INCH, HERMETIC SEALED, CERAMIC, DIP-24	针数：	24
Reach Compliance Code：	not_compliant	ECCN代码：	3A001.A.2.C
HTS代码：	8542.39.00.01	风险等级：	5.11
转换器类型：	D/A CONVERTER	输入位码：	BINARY
输入格式：	PARALLEL, WORD	JESD-30 代码：	R-CDIP-T24
JESD-609代码：	e0	长度：	30.48 mm
最大线性误差 (EL)：	0.024%	标称负供电电压：	-15 V
位数：	12	功能数量：	1
端子数量：	24	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	DIP	封装等效代码：	DIP24,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	+-12/+-15 V
认证状态：	Qualified	筛选级别：	38535Q/M;38534H;883B
最大稳定时间：	4 µs	标称安定时间 (tstl)：	3 µs
子类别：	Other Converters	最大压摆率：	23 mA
标称供电电压：	15 V	表面贴装：	NO
技术：	BIPOLAR	温度等级：	MILITARY
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
Base Number Matches：	1

5962-8961701LA 数据手册

AD767

Figure 5e. Fine-Scale Settling, C_F= 20 pF

Figure 6. 68000 – AD767 Interface

8086 – AD767 INTERFACE

Interfacing the AD767 to the 8086 16-bit microprocessor

requires a minimal amount of external components. A 10 MHz

8086, for example, generates a 165 ns low write pulse which

may be gated with a decoded address to provide CS for the

AD767. As WR returns high valid data is latched into the DAC.

See Figure 7.

DIGITAL INPUT CONSIDERATIONS

The threshold of the digital input circuitry is set at 1.4 volts and

does not change with supply voltage. Thus the AD767 digital

interface may be driven with any of the popular types of 5 volt

logic.

A good engineering practice is to connect unused inputs to

power ground to improve noise immunity. Unconnected data

and control inputs will float to logic 0 if left open.

The low digital input current of the AD767 eliminates the need

for buffer/drivers required by many monolithic converters using

bipolar technology. A single low-power Schottky gate, for

example, will drive several AD767s when connected to a

common bus.

INPUT CODING

The AD767 uses positive-true binary input coding. Logic “1” is

represented by an input voltage greater than 2.0 V, and logic

“0” is defined as an input voltage less than 0.8 V.

Unipolar coding is straight binary, where all zeroes (000_H) on

the data inputs yields a zero analog output and all ones (FFF_H)

yields an analog output 1 LSB below full scale.

Figure 7. 8086 – AD767 Interface

TMS32010 – AD767 INTERFACE

The high-speed digital interface of the AD767 facilitates its use

with the TMS32010 microprocessor at speeds up to 20 MHz.

In the three multiplexed LSBs of the address bus, PA2 – PA0

are decoded as a port address and OR’ed with the low write

enable to generate CS for the DAC. A simple OUT xx,y

instruction will output the data word stored in memory location

xx to any one of eight port locations y.

Bipolar coding is offset binary, where an input code of 000_H

yields a minus full-scale output, an input of FFF_Hyields an

output 1 LSB below positive full scale, and zero occurs for an

input code with only the MSB on (800_H).

The AD767 can be used with twos complement input coding if

an inverter is used on the MSB (DB11).

MICROPROCESSOR INTERFACE

The AD767, with its 40 ns minimum CS pulse width, may be

easily interfaced to any of today’s high-speed microprocessors.

The 12-bit single buffered input register will accept 12-bit

parallel data from processors such as the 68000, 8086, TMS320

series, and the Analog Devices ADSP-2100. Several illustrative

examples follow.

68000 – AD767 INTERFACE

Figure 6 illustrates the AD767 interface to a 68000 micro-

processor. An active low decoded address is OR’ed with the

processor’s R/W signal to provide CS and latch data into the

AD767. Later in the bus cycle the processor issues the upper

(UDS) and lower (LDS) data strobes which are gated with the

decoded address to provide DTACK and terminate the bus

cycle. As shown, this interface will support a 12.5 MHz 68000

system.

Figure 8. TMS32010 – AD767 Interface

TMS32020 – AD767 INTERFACE

Interfacing the AD767 to the TMS32020 microprocessor is

easily achieved by using the TMS32020 I/O port capability. The

IS signal distinguishes the I/O address space from the local

program/data memory space and is used to enable a 74LS138

decoder. The decoded port address is then gated with the R/W

and STRB signals to provide the AD767 CS.

REV. A

–7–

1...4 5 678

下载PDF

与5962-8961701LA相关器件

型号	品牌	描述	获取价格	数据表
5962-8961701LX	ETC	12-Bit Digital-to-Analog Converter	获取价格
5962-89620012A	ETC	Current-Feedback Operational Amplifier	获取价格
5962-89620012X	ETC	Current-Feedback Operational Amplifier	获取价格
5962-8962001PA	ETC	Current-Feedback Operational Amplifier	获取价格
5962-8962001PX	ETC	Current-Feedback Operational Amplifier	获取价格
5962-89621012A	NSC	暂无描述	获取价格

与5962-8961701LA相关文章

资料手册解读：UC3842参数和管脚说明
2024-05-22

3
一文带你了解无源晶振的负载电容为何要加两颗谐振电容CL1和CL2
2024-05-22

4
玻璃管保险丝与陶瓷管保险丝：区别与替代性探讨
2024-05-22

2
PCF8574资料解读：主要参数分析、引脚说明
2024-05-21

11

产品中心

服务支持

精选活动

关于我们

帮助中心

5962-8961701LA

5962-8961701LA 技术参数

5962-8961701LA 数据手册

与5962-8961701LA相关器件

与5962-8961701LA相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

5962-8961701LA

5962-8961701LA 技术参数

5962-8961701LA 数据手册

与5962-8961701LA相关器件

与5962-8961701LA相关文章

您还可以找

您在本页遇到什么问题？