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5962-8950301PA PDF预览

5962-8950301PA

更新时间: 2024-11-29 21:53:23
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 400K
描述
LinCMOSE TIMERS

5962-8950301PA 数据手册

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ꢀꢁ ꢂꢃ ꢃꢃ  
ꢀꢉ ꢆ ꢊ ꢋ  
SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005  
D, DB, JG, OR P PACKAGE  
(TOP VIEW)  
D
Very Low Power Consumption  
− 1 mW Typ at V = 5 V  
DD  
D
Capable of Operation in Astable Mode  
GND  
TRIG  
OUT  
V
DD  
1
2
3
4
8
7
6
5
D
CMOS Output Capable of Swinging Rail  
to Rail  
DISCH  
THRES  
CONT  
D
High Output-Current Capability  
− Sink 100 mA Typ  
− Source 10 mA Typ  
RESET  
FK PACKAGE  
(TOP VIEW)  
D
D
Output Fully Compatible With CMOS, TTL,  
and MOS  
Low Supply Current Reduces Spikes  
During Output Transitions  
3
2
1
20 19  
18  
NC  
NC  
4
D
Single-Supply Operation From 2 V to 15 V  
DISCH  
NC  
TRIG  
17  
16  
15  
14  
5
6
7
8
D
Functionally Interchangeable With the  
NE555; Has Same Pinout  
NC  
OUT  
NC  
THRES  
NC  
D
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015.2  
9 10 11 12 13  
Available in Q-Temp Automotive  
High Reliability Automotive Applications  
Configuration Control/Print Support  
Qualification to Automotive Standards  
PW PACKAGE  
(TOP VIEW)  
description  
GND  
1
2
3
4
5
6
7
V
NC  
DISCH  
NC  
THRES  
NC  
14  
13  
12  
11  
10  
9
DD  
The TLC555 is a monolithic timing circuit  
NC  
TRIG  
NC  
OUT  
NC  
fabricated using the TI LinCMOSprocess. The  
timer is fully compatible with CMOS, TTL, and  
MOS logic and operates at frequencies up to  
2 MHz. Because of its high input impedance, this  
device uses smaller timing capacitors than those  
used by the NE555. As a result, more accurate  
time delays and oscillations are possible. Power  
consumption is low across the full range of power  
supply voltage.  
RESET  
8
CONT  
NC − No internal connection  
Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a  
threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of  
the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is  
set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the  
threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs  
and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low.  
Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and  
GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering.  
While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC555 exhibits greatly  
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling  
capacitors required by the NE555.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
LinCMOS is a trademark of Texas Instruments.  
ꢌꢋ ꢇ ꢍꢎ ꢂ ꢀꢉ ꢇ ꢏ ꢍ ꢐꢀꢐ ꢄꢅ ꢑ ꢒꢓ ꢔ ꢕꢖ ꢄꢒꢅ ꢄꢗ ꢘꢙ ꢓ ꢓ ꢚꢅꢖ ꢕꢗ ꢒꢑ ꢛꢙꢜ ꢝꢄꢘ ꢕꢖ ꢄꢒꢅ ꢞꢕ ꢖꢚ ꢟ  
ꢌꢓ ꢒ ꢞꢙꢘ ꢖ ꢗ ꢘ ꢒꢅ ꢑꢒ ꢓ ꢔ ꢖ ꢒ ꢗ ꢛꢚ ꢘ ꢄꢑ ꢄꢘꢕ ꢖꢄ ꢒꢅꢗ ꢛꢚ ꢓ ꢖꢠ ꢚ ꢖꢚ ꢓ ꢔꢗ ꢒꢑ ꢀꢚꢡ ꢕꢗ ꢉꢅꢗ ꢖꢓ ꢙꢔ ꢚꢅꢖ ꢗ  
ꢗ ꢖ ꢕ ꢅꢞ ꢕ ꢓꢞ ꢢ ꢕ ꢓꢓ ꢕ ꢅ ꢖꢣꢟ ꢌꢓ ꢒ ꢞꢙꢘ ꢖꢄꢒꢅ ꢛꢓ ꢒꢘ ꢚꢗ ꢗꢄ ꢅꢤ ꢞꢒꢚ ꢗ ꢅꢒꢖ ꢅꢚ ꢘꢚ ꢗꢗ ꢕꢓ ꢄꢝ ꢣ ꢄꢅꢘ ꢝꢙꢞ ꢚ  
ꢖ ꢚ ꢗ ꢖꢄ ꢅꢤ ꢒꢑ ꢕ ꢝꢝ ꢛꢕ ꢓ ꢕ ꢔ ꢚ ꢖ ꢚ ꢓ ꢗ ꢟ  
Copyright 1983−2005, Texas Instruments Incorporated  
ꢇ ꢅ ꢛ ꢓ ꢒꢞ ꢙꢘ ꢖꢗ ꢘꢒ ꢔꢛ ꢝꢄ ꢕꢅ ꢖ ꢖꢒ ꢆꢉ ꢁꢥ ꢌꢋ ꢦ ꢥꢧꢨꢃ ꢧꢃꢩ ꢕꢝꢝ ꢛꢕ ꢓ ꢕ ꢔꢚ ꢖꢚꢓ ꢗ ꢕ ꢓ ꢚ ꢖꢚ ꢗꢖꢚ ꢞ  
ꢙ ꢅꢝ ꢚꢗꢗ ꢒ ꢖꢠꢚ ꢓ ꢢꢄ ꢗꢚ ꢅ ꢒꢖꢚ ꢞꢟ ꢇ ꢅ ꢕꢝ ꢝ ꢒ ꢖꢠꢚ ꢓ ꢛꢓ ꢒ ꢞꢙꢘ ꢖꢗ ꢩ ꢛꢓ ꢒ ꢞꢙꢘ ꢖꢄꢒ ꢅ  
ꢛ ꢓ ꢒꢘꢚ ꢗꢗꢄ ꢅꢤ ꢞ ꢒꢚꢗ ꢅ ꢒꢖ ꢅ ꢚꢘꢚꢗ ꢗꢕꢓ ꢄ ꢝꢣ ꢄ ꢅꢘꢝ ꢙ ꢞꢚ ꢖꢚꢗ ꢖꢄꢅ ꢤ ꢒꢑ ꢕ ꢝꢝ ꢛꢕ ꢓ ꢕ ꢔꢚ ꢖꢚꢓ ꢗ ꢟ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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