71256S/L
CMOS Static RAM 256K (32K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Low VCC Data Retention Waveform
DATA
RETENTION
MODE
VCC
4.5V
4.5V
VDR ≥ 2V
t
CDR
tR
CS
VIH
VIH
VDR
2946 drw 06
AC Electrical Characteristics (VCC = 5.0V ± 10%, All Temperature Ranges)
71256S25
71256L25
71256S35
71256L35
71256S45(3)
71256L45(3)
71256L20(1)
Symbol
Parameter
Unit
Min. Max.
Min.
Max.
Min.
Max.
Min. Max.
Read Cycle
____
____
____
____
t
RC
AA
ACS
Read Cycle Time
20
25
35
45
ns
ns
ns
ns
____
____
____
____
t
Address Access Time
20
25
35
45
____
____
____
____
t
Chip Select Access Time
20
25
35
45
____
____
____
____
(2)
CLZ
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
Output Hold from Address Change
5
5
5
5
t
____
____
____
____
(2)
10
11
15
20
ns
ns
ns
ns
ns
tCHZ
____
____
____
____
tOE
10
11
15
20
____
____
____
____
(2)
(2)
2
2
5
2
2
5
2
2
5
0
tOLZ
____
8
10
15
20
tOHZ
____
____
____
____
tOH
5
Write Cycle
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
t
WC
CW
AW
AS
WP
WR
DW
Write Cycle Time
20
15
15
0
25
20
20
0
35
30
30
0
45
40
40
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
t
t
t
Write Pulse Width
15
0
20
0
30
0
35
0
t
Write Recovery Time
t
Data to Write Time Overlap
Write Enable to Output in High-Z
Data Hold from Write Time
Output Active from End-of-Write
11
13
15
20
____
____
____
____
(2)
WHZ
10
11
15
20
t
____
____
____
____
tDH
0
5
0
5
0
5
0
5
____
____
____
____
(2)
OW
ns
t
2946 tbl 12
NOTES:
1. 0° to +70°C or -40° to +85°C temperature range only.
2. This parameter is guaranteed by device characterization, but is not production tested.
3. –55°C to +125°C temperature range only.
6.42
5
Aug.06.20