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5962-8865801XA PDF预览

5962-8865801XA

更新时间： 2024-01-26 04:19:13
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
12页 165K
描述
IC 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP32, HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-32, Analog to Digital Converter

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5962-8865801XA 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：32
Reach Compliance Code：unknownECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01风险等级：5.56
Is Samacsys：N最大模拟输入电压：10 V
最小模拟输入电压：-10 V最长转换时间：6 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：R-XDIP-T32
JESD-609代码：e0长度：40.945 mm
最大线性误差 (EL)：0.0183%标称负供电电压：-15 V
模拟输入通道数量：1位数：12
功能数量：1端子数量：32
最高工作温度：125 °C最低工作温度：-55 °C
输出位码：BINARY, OFFSET BINARY输出格式：PARALLEL, WORD
封装主体材料：UNSPECIFIED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified采样并保持/跟踪并保持：SAMPLE
筛选级别：MIL-PRF-38534座面最大高度：7.11 mm
标称供电电压：15 V表面贴装：NO
温度等级：MILITARY端子面层：TIN LEAD
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：15.24 mm
Base Number Matches：1

5962-8865801XA 数据手册

 浏览型号5962-8865801XA的Datasheet PDF文件第5页浏览型号5962-8865801XA的Datasheet PDF文件第6页浏览型号5962-8865801XA的Datasheet PDF文件第7页浏览型号5962-8865801XA的Datasheet PDF文件第9页浏览型号5962-8865801XA的Datasheet PDF文件第10页浏览型号5962-8865801XA的Datasheet PDF文件第11页 
AD578/AD579  
Table II. AD579 Digital Output Codes vs. Analog Input for Unipolar and Bipolar Ranges  
Digital Output Code  
(Binary for Unipolar Ranges;  
Analog Input—Volts  
(Center of Quantization Interval)  
Offset Binary for Bipolar Ranges)  
0 V to +10 V  
Range  
0 V to +20 V  
Range  
–5 V to +5 V  
Range  
–10 V to +10 V  
Range  
B1  
(MSB)  
B12  
(LSB)  
+9.9902  
+9.9804  
+19.9804  
+19.9609  
+4.9902  
+4.9804  
+9.9804  
+9.9609  
1 1 1 1 1 1 1 1 1 1 1 1  
1 1 1 1 1 1 1 1 1 1 1 0  
∑
∑
∑
∑
∑
∑
∑
+10.0195  
+10.0000  
∑
∑
∑
∑
+5.0097  
+5.0000  
∑
+0.0097  
+0.0000  
∑
+0.0195  
+0.0000  
∑
1 0 0 0 0 0 0 0 0 0 0 1  
1 0 0 0 0 0 0 0 0 0 0 0  
∑
∑
∑
∑
∑
∑
+0.0097  
+0.0000  
+0.0195  
+0.0000  
–4.9902  
–5.0000  
–9.9804  
–10.0000  
0 0 0 0 0 0 0 0 0 0 0 1  
0 0 0 0 0 0 0 0 0 0 0 0  
BIPOLAR OPERATION  
LAYOUT CONSIDERATIONS  
The connections for bipolar ranges are shown in Figure 4. Again,  
as for the unipolar ranges, if the offset and gain specifications  
are sufficient, the 100 W trimmer shown can be replaced by a  
50 W ± 1% fixed resistor. The analog input is applied as for the  
unipolar ranges. Bipolar calibration is similar to unipolar calibra-  
tion. First, a signal 1/2 LSB above negative full scale is applied,  
and R1 is trimmed to give the first transition (0000 0000 0000  
to 0000 0000 0001). A signal 1 1/2 LSB below positive full  
scale is applied and R2 trimmed to give the last transition  
(1111 1111 1110 to 1111 1111 1111).  
Many data acquisition components have two or more ground pins  
that are not connected together within the device. These grounds  
are usually referred to as the Logic Power Return, Analog Com-  
mon (Analog Power Return), and Analog Signal Ground. These  
grounds must be tied together at one point, usually at the system  
power supply ground. Ideally, a single solid ground would be  
desirable. However, since current flows through the ground  
wires and etch stripes of the circuit cards, and since these paths  
have resistance and inductance, hundreds of millivolts can be  
generated between the system ground point and the ground pin  
of the AD578 or AD579. Separate ground returns should be  
provided to minimize the current flow in the path from sensitive  
points to the system ground point. In this way supply currents  
and logic-gate return currents are not summed into the same  
return path as analog signals, where they would cause measure-  
ment errors.  
ZERO ADJ  
؎10V  
20V IN  
ANALOG INPUTS  
BITS 1–12 (AD578)  
10V IN  
BITS 1–10 (AD579)  
–15V  
؎5V  
+5V  
0.1␮F  
0.1␮F  
0.1␮F  
10␮F  
AD578/AD579  
+
+
ANALOG  
COMMON  
BIP OFF  
R1  
10␮F  
DIG  
COM  
100⍀  
10␮F  
+
CLK OUT  
CLK IN  
REF IN  
+15V  
R2  
100⍀  
REF OUT  
Figure 5. Basic Bypassing Practice  
+
6.8␮F  
Each of the AD578 or AD579 supply terminals should be capaci-  
tively decoupled as close to the ADC as possible. A large value  
capacitor such as 10 mF in parallel with a 0.1 mF capacitor is  
usually sufficient. Analog supplies are bypassed to the Analog  
Power Return pin and the logic supply is bypassed to the Digital  
GND pin.  
DIG GND  
ANA GND  
Figure 4. Bipolar Input Connections  
To minimize noise, the reference output (Pin 24) should be  
decoupled by a 6.8 mF capacitor to Pin 30.  
REV. B  
–8–  
1...56789101112

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