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5962-8862801VZA PDF预览

5962-8862801VZA

更新时间: 2024-02-29 12:13:24
品牌 Logo 应用领域
其他 - ETC 显示器总线控制器外围集成电路数据传输LORA通信时钟
页数 文件大小 规格书
52页 1271K
描述
BCRT Bus Controller/Remote Terminal/Monitor

5962-8862801VZA 技术参数

生命周期:Obsolete包装说明:CERAMIC, LCC-84
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.74地址总线宽度:16
边界扫描:NO通信协议:MIL STD 1553B
最大数据传输速率:0.125 MBps外部数据总线宽度:16
JESD-30 代码:S-CQCC-N84低功率模式:NO
串行 I/O 数:2端子数量:84
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:SQUARE封装形式:CHIP CARRIER
认证状态:Not Qualified筛选级别:MIL-STD-883
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子位置:QUAD
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553Base Number Matches:1

5962-8862801VZA 数据手册

 浏览型号5962-8862801VZA的Datasheet PDF文件第3页浏览型号5962-8862801VZA的Datasheet PDF文件第4页浏览型号5962-8862801VZA的Datasheet PDF文件第5页浏览型号5962-8862801VZA的Datasheet PDF文件第7页浏览型号5962-8862801VZA的Datasheet PDF文件第8页浏览型号5962-8862801VZA的Datasheet PDF文件第9页 
7
8
9
[0]  
[0]  
[1]  
Channel B Enabled. A logic one indicates that Channel B is available for  
both reception and transmission.  
Channel A Enabled. A logic one indicates that Channel A is available for  
both reception and transmission.  
Terminal Flag Enabled. A logic one indicates that the Bus Controller has  
not issued an Inhibit Terminal Flag mode code. A logic zero indicates that  
the Bus Controller, via the above mode code, is overriding the host sys-  
tem’s ability to set the Terminal Flag bit of the status word.  
10  
11  
12  
[0]  
[0]  
[0]  
Busy. A logic one indicates the Busy bit is set. This bit is reset when the  
SystemBusy bit in the Control Register is reset.  
Self-Test. A logic one indicates that the RTI is in the self-test mode. This  
bit isreset when the self-test is terminated.  
TA Parity Error. A logic one indicates the wrong Terminal Address parity;  
it causes the biphase inputs to be disabled and a message error condition.  
This bit is reset by reloading the terminal address latch with correct parity.  
13  
14  
15  
[0]  
[0]  
[0]  
Message Error. A logic one indicates that a message error has occurred  
since the last System Register read. This bit is not reset until the System  
Register has been examined and the message error condition is removed.  
Valid Message. A logic one indicates that a valid message has been  
received since the last System Register read. This bit is not reset until the  
System Register has been examined.  
Terminal Active. A logic one indicates the device is executing a transmit or  
receive operation. The state of this bit is the logical NAND of the external  
XMIT and RCV pins.  
SYSTEM REGISTER (READ ONLY)  
TERM  
ACTV  
VAL MESS TAPA SELF- BUSY  
TFEN CH A  
EN  
CH B  
EN  
CHNL  
A/B  
MC/  
SA  
MCSA MCSA MCSA MCSA MCSA  
MESS  
ERR  
ERR  
TEST  
4
3
2
1
0
[0]  
[0]  
[0]  
[0]  
[0]  
[1]  
[0]  
[0]  
[1]  
[0]  
[0]  
[0]  
[0]  
[0]  
[0]  
LSB  
[0]  
MSB  
[ ] defines reset state  
Figure 5. System Registers  
RTI-6  

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