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5962-87683012A PDF预览

5962-87683012A

更新时间: 2024-11-26 23:00:11
品牌 Logo 应用领域
德州仪器 - TI 解码器驱动器解复用器逻辑集成电路
页数 文件大小 规格书
13页 485K
描述
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

5962-87683012A 技术参数

生命周期:Active零件包装代码:QLCC
包装说明:LCC-20针数:20
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.39Is Samacsys:N
系列:ALS输入调节:STANDARD
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.008 A位数:4
功能数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):13 mA
Prop。Delay @ Nom-Sup:14 ns传播延迟(tpd):17 ns
认证状态:Qualified筛选级别:MIL-STD-883
座面最大高度:2.03 mm子类别:Decoder/Driver
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.89 mmBase Number Matches:1

5962-87683012A 数据手册

 浏览型号5962-87683012A的Datasheet PDF文件第2页浏览型号5962-87683012A的Datasheet PDF文件第3页浏览型号5962-87683012A的Datasheet PDF文件第4页浏览型号5962-87683012A的Datasheet PDF文件第5页浏览型号5962-87683012A的Datasheet PDF文件第6页浏览型号5962-87683012A的Datasheet PDF文件第7页 
SN54ALS139, SN74ALS139  
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS  
SDAS204A – APRIL 1982 – REVISED DECEMBER 1994  
SN54ALS139 . . . J PACKAGE  
SN74ALS139 . . . D OR N PACKAGE  
(TOP VIEW)  
Designed Specifically for High-Speed  
Memory Decoders and Data Transmission  
Systems  
Incorporate Two Enable Inputs to Simplify  
1G  
1A  
1B  
1Y0  
1Y1  
1Y2  
1Y3  
GND  
V
CC  
2G  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Cascading and/or Data Reception  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
2A  
2B  
2Y0  
2Y1  
2Y2  
2Y3  
description  
The ALS139 are dual 2-line to 4-line  
decoders/demultiplexers designed for use in  
high-performance memory-decoding or data-  
routing applications requiring very short  
propagation delay times. In high-performance  
memory systems, these devices can minimize the  
effects of system decoding. When employed with  
high-speed memories utilizing a fast-enable  
circuit, the delay times of these decoders and the  
enable time of the memory are usually less than  
the typical access time of the memory. Therefore,  
the effective system delay introduced by the  
Schottky-clamped system decoder is negligible.  
SN54ALS139 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18 2A  
1B  
1Y0  
NC  
4
5
6
7
8
17  
16  
15  
14  
2B  
NC  
2Y0  
2Y1  
1Y1  
1Y2  
9 10 11 12 13  
The ALS139 comprise two individual 2-line to  
4-line decoders in a single package. The  
active-low enable (G) input can be used as a data  
line in demultiplexing applications. These  
NC – No internal connection  
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its  
driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line ringing and  
simplify system design.  
The SN54ALS139 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74ALS139 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
SELECT  
ENABLE  
G
B
X
L
A
X
L
Y0  
H
L
Y1  
H
H
L
Y2  
H
H
H
L
Y3  
H
H
H
H
L
H
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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