FLASH
AS8FLC2M32
FIGURE 1: PIN ASSIGNMENT
Hermetic, Multi-Chip Module
(Top View)
(MCM)
64Mb, 2M x 32, 3.3Volt Boot Block FLASH Array
Available via Applicable Specifications:
•
•
MIL-PRF-38534, Class H
DSCC SMD 5962-08245
I/O0
DQ0
I/O1
DQ1
10
11
12
60
59
78
57
76
I/O16
DQ16
I/O17
DQ17
I/O18
DQ18
DQ2
I/02
I/O3
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DQ3
I/O19
DQ19
I/O4
DQ4
DQ20
I/O20
FEATURES
•
•
I/O5
DQ5
I/O6
DQ6
DQ7
I/O7
GND
DQ8
I/O8
DQ9
I/O9
I/O21
55
54
53
DQ21
64Mb device, total density, organized as 2M x 32
Bottom Boot Block (Sector) Architecture
(Contact factory for top boot)
Operation with single 3.0V Supply
Available in multiple Access time variations
Individual byte control via individual byte selects (CSx\)
Low Power CMOS
1,000,000 Erase/Program Cycles
Minimum 1,000,000 Program/Erase Cycles per sector
guaranteed
I/O22
DQ22
DQ23
I/O23
GND
I/O24
DQ24
I/O25
DQ25
I/O26
DQ26
I/O27
DQ27
52
51
50
49
48
47
46
45
44
DQ10
I/O10
•
•
•
•
•
•
DQ11
I/O11
[Package Designator QT]
DQ12
DQ28
O28
I/
I/012
DQ13
I/O13
DQ29
I/O29
DQ14
DQ30
I/O30
DQ31
I/O14
DQ15
I/O15
I/O31
•
Sector Architecture:
•
One 16K byte, two 8K byte, one 32K byte and
thirty-one 64Kbyte sectors (byte mode)
Pin Assignment
(Top View)
I
D
/O
Q
8
8
Reset\
CS2\
DQ24
I/O24
I
D
/O
Q
1
15
5
VCC
CS4\
ID/OQ3311
•
•
•
•
Any combination of sectors can be concurrently erased
MCM supports full array (multi-chip) Erase
Embedded Erase and Program Algorithms
Erase Suspend/Resume; Supports reading data from or
programming data to a sector not being Erased
TTL Compatible Inputs and Outputs
I/O25
DQ25
D
/O
Q
9
9
DQ14
I/O14
DQ30
I/O30
I
DQ10
I/O10
GND
D
I/
Q
O
1
1
3
3
I/O26
DQ26
NC
I/O29
DQ29
DQ11
I/O11
DQ12
I/O12
A14
A16
A11
A0
DQ27
I/O27
DQ28
I/O28
A7
A10
A9
OE\
A17
WE\
A4
A5
A6
A1
A2
A3
A12
•
•
A20
NC
66 HIP
Military and Industrial operating temperature ranges
A15
VCC
CS1\
A19
A13
A8
A18
I/O7
DQ7
DQ23
NC I/O23
OPTION
Access Speed
70ns*
MARKING
I
D
/OQ0
I/
/O
0
DI/O
Q6
6
DQ22
I/O22
I/O16
DQ16
CS3\
GND
D
Q
O
1
1
I/O5
DQ5
I/O21
DQ21
D 7
I/OQ117
-70
I/O3
DQ3
I/O4
DQ4
I
D
Q
2
2
I/O18
DQ18
DI/OQ199
I/O20
DQ20
90ns
-90
100ns
120ns
-100
-120
[Package Designator PH]
*Contact Factory
GENERAL DESCRIPTION
Package
The AS8FLC2M32B is a 64Mb FLASH Multi-Chip Module
organized as 2M x 32 bits. The module achieves high speed
access, low power consumption and high reliability by employ-
ing advanced CMOS memory technology. The military grade
product is manufactured in compliance to the MIL-PRF-38534
specifications, making the AS8FLC2M32B ideally suited for
military or space applications. The module is offered in a
68-lead 0.990 inch square ceramic quad flat pack or 66-lead
1.185inch square ceramic Hex In-line Package (HIP). The
CQFP package design is targeted for those applications, which
require low profile SMT Packaging.
Ceramic Quad Flat Pack
Ceramic Hex Inline Pack
Q
P
Temperature Range
Full Mil (MIL-PRF-38534, Class H /Q
Military Temp (-55oC to +125oC) /XT
Industrial (-40oC to +85oC)
/IT
For more products and information
please visit our web site at
www.micross.com
Micross Components reserves the right to change products or specifications without notice.
AS8FLC2M32B
Rev. 1.6 05/11
1