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5962-0053501QXA PDF预览

5962-0053501QXA

更新时间: 2024-11-25 14:46:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟ATM异步传输模式PC外围集成电路
页数 文件大小 规格书
40页 333K
描述
PCI Bus Controller, CMOS, CBGA303, CERAMIC, CGA-303

5962-0053501QXA 技术参数

是否Rohs认证:不符合生命周期:Transferred
零件包装代码:CGA包装说明:BGA, BGA303,19X16,50
针数:303Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.31.00.01
风险等级:5Is Samacsys:N
地址总线宽度:32总线兼容性:60X; POWERPC 601; POWERPC 603; POWERPC 604
最大时钟频率:66 MHz外部数据总线宽度:64
JESD-30 代码:R-CBGA-B303JESD-609代码:e0
长度:25 mm端子数量:303
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:BGA
封装等效代码:BGA303,19X16,50封装形状:RECTANGULAR
封装形式:GRID ARRAY电源:3.3 V
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class Q
子类别:Memory Controllers最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:21 mm
uPs/uCs/外围集成电路类型:BUS CONTROLLER, PCIBase Number Matches:1

5962-0053501QXA 数据手册

 浏览型号5962-0053501QXA的Datasheet PDF文件第2页浏览型号5962-0053501QXA的Datasheet PDF文件第3页浏览型号5962-0053501QXA的Datasheet PDF文件第4页浏览型号5962-0053501QXA的Datasheet PDF文件第5页浏览型号5962-0053501QXA的Datasheet PDF文件第6页浏览型号5962-0053501QXA的Datasheet PDF文件第7页 
Features  
Processor Bus Frequency Up to 66 MHz and 83.3 MHz  
64-bit Data Bus and 32-bit Address Bus  
L2 Cache Control for 256-Kbyte, 512-Kbyte, 1-Mbyte Sizes  
Provides Support for Either Asynchronous SRAM, Burst SRAM  
or Pipelined Burst SRAM  
Compliant with PCI Specification, Revision 2.1  
PCI Interface Operates at 20 to 33 MHz, 3.3V/5.0V-compatible  
IEEE 1149.1-compliant, JTAG Boundary-scan Interface  
PD Max = 1.7 Watts (66 MHz), Full Operating Conditions  
Nap, Doze and Sleep Modes Reduce Power Consumption  
Fully Compliant with MIL-STD-883 Class Q or According to Atmel Standards  
Upscreenings Based on Atmel Standards  
Full Military Temperature Range (-55°C TC +125°C)  
– Industrial Temperature Range (-40°C TC +110°C)  
VCC = 3.3V 5%  
PCI Bridge/  
Memory  
Controller  
Available in a 303-ball CBGA or a 303-ball CBGA with Solder Column Interposer (SCI)  
(CI-CGA) Package  
TSPC106  
Description  
The TSPC106 provides an integrated, high-bandwidth, high-performance, TTL-com-  
patible interface between a 60x processor, a secondary (L2) cache or up to a total of  
four additional 60x processors, the PCI bus and main memory.  
PCI support allows system designers to rapidly design systems using peripherals  
already designed for PCI.  
The TSPC106 uses an advanced 3.3V CMOS-process technology and maintains full  
interface compatibility with TTL devices.  
The TSPC106 integrates system testability and debugging features via JTAG bound-  
ary-scan capability.  
GS suffix  
CI CGA 303  
G suffix  
CBGA 303  
Ceramic Ball Grid Array  
Ceramic Ball Grid Array  
with Solder Column Interposer (SCI)  
Rev. 2102BHIREL02/02  

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