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5962-0051001QXA

更新时间： 2024-02-25 11:08:40
品牌 Logo 应用领域
德州仪器 - TI 外围集成电路时钟
页数 文件大小 规格书
81页 1213K
描述
FIXED POINT SIGNAL PROCESSOR

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5962-0051001QXA 技术参数

生命周期：Active零件包装代码：BGA
包装说明：BGA, BGA429,21X21,50针数：429
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.31.00.01风险等级：5.26
其他特性：ALSO REQUIRES 3.3V SUPPLY地址总线宽度：22
桶式移位器：NO位大小：32
边界扫描：YES最大时钟频率：200 MHz
外部数据总线宽度：32格式：FIXED POINT
集成缓存：YES内部总线架构：MULTIPLE
JESD-30 代码：S-CBGA-B429JESD-609代码：e0
长度：27 mm低功率模式：YES
DMA 通道数量：4外部中断装置数量：4
端子数量：429计时器数量：2
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：BGA
封装等效代码：BGA429,21X21,50封装形状：SQUARE
封装形式：GRID ARRAY峰值回流温度（摄氏度）：NOT SPECIFIED
电源：1.5,3.3 V认证状态：Qualified
RAM（字数）：131072筛选级别：MIL-PRF-38535
座面最大高度：3.3 mm子类别：Digital Signal Processors
最大供电电压：1.57 V最小供电电压：1.43 V
标称供电电压：1.5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：BALL
端子节距：1.27 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：27 mm
uPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches：1

5962-0051001QXA 数据手册

 浏览型号5962-0051001QXA的Datasheet PDF文件第5页浏览型号5962-0051001QXA的Datasheet PDF文件第6页浏览型号5962-0051001QXA的Datasheet PDF文件第7页浏览型号5962-0051001QXA的Datasheet PDF文件第9页浏览型号5962-0051001QXA的Datasheet PDF文件第10页浏览型号5962-0051001QXA的Datasheet PDF文件第11页 
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄ ꢅꢃ  
ꢈ ꢉ ꢊꢋ ꢌꢍꢎ ꢏꢉ ꢐ ꢑ ꢌ ꢉ ꢒꢉ ꢑꢓꢔ ꢀ ꢉ ꢒꢐ ꢓꢔ ꢎ ꢕꢏ ꢆꢋꢀ ꢀꢏ ꢕ  
SGUS033 – FEBRUARY 2002  
memory map summary  
Table 2 shows the memory map address ranges of the C6203 device. The C6203 device has the capability of  
a MAP 0 or MAP 1 memory block configuration. These memory block configurations are set up at reset by the  
boot configuration pins (generically called BOOTMODE[4:0]). For the C6203 device, the BOOTMODE  
configuration is handled, at reset, by the expansion bus module (specifically XD[4:0] pins). For more detailed  
information on the C6203 device settings, which include the device boot mode configuration at reset and other  
device-specific configurations, see the Boot Configuration section and the Boot Configuration Summary table  
of the TMS320C6000 Peripherals Reference Guide (literature number SPRU190).  
Table 2. 320C6203 Memory Map Summary  
MEMORY BLOCK DESCRIPTION  
BLOCK SIZE  
HEX ADDRESS RANGE  
(BYTES)  
MAP 0  
External Memory Interface (EMIF) CE0  
EMIF CE0  
MAP 1  
Internal Program RAM  
Reserved  
384K  
0000_0000 – 0005_FFFF  
0006_0000 – 003F_FFFF  
0040_0000 – 00FF_FFFF  
0100_0000 – 013F_FFFF  
0140_0000 – 0145_FFFF  
0146_0000 – 017F_FFFF  
0180_0000 – 0183_FFFF  
0184_0000 – 0187_FFFF  
0188_0000 – 018B_FFFF  
018C_0000 – 018F_FFFF  
0190_0000 – 0193_FFFF  
0194_0000 – 0197_FFFF  
0198_0000 – 019B_FFFF  
019C_0000 – 019C_01FF  
019C_0200 – 019F_FFFF  
01A0_0000 – 01A3_FFFF  
01A4_0000 – 01A7_FFFF  
01A8_0000 – 01FF_FFFF  
0200_0000 – 02FF_FFFF  
0300_0000 – 03FF_FFFF  
0400_0000 – 3FFF_FFFF  
4000_0000 – 4FFF_FFFF  
5000_0000 – 5FFF_FFFF  
6000_0000 – 6FFF_FFFF  
7000_0000 – 7FFF_FFFF  
8000_0000 – 8007_FFFF  
8008_0000 – FFFF_FFFF  
4M – 384K  
12M  
EMIF CE0  
EMIF CE0  
EMIF CE1  
EMIF CE0  
4M  
Internal Program RAM  
Reserved  
EMIF CE1  
384K  
EMIF CE1  
4M – 384K  
256K  
EMIF Registers  
DMA Controller Registers  
Expansion Bus Registers  
McBSP 0 Registers  
McBSP 1 Registers  
Timer 0 Registers  
256K  
256K  
256K  
256K  
256K  
Timer 1 Registers  
256K  
Interrupt Selector Registers  
Power-Down Registers  
Reserved  
512  
256K – 512  
256K  
McBSP 2 Registers  
Reserved  
256K  
5.5M  
EMIF CE2  
16M  
EMIF CE3  
16M  
Reserved  
1G – 64M  
256M  
Expansion bus XCE0  
Expansion bus XCE1  
Expansion bus XCE2  
Expansion bus XCE3  
Internal Data RAM  
Reserved  
256M  
256M  
256M  
512K  
2G – 512K  
8
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1...567891011...81

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