Freescale Semiconductor, Inc.
2.2 Power and Ground Signals
Table 3. Power Inputs
No. of Pins
Signal Name
VDD
Signal Description
8
Power—These pins provide power to the internal structures of the chip, and
should all be attached to VDD.
1
VDDA
Analog Power—This pin is a dedicated power pin for the analog portion of the
chip and should be connected to a low noise 3.3V supply.
Table 4. Grounds
No. of Pins
Signal Name
VSS
Signal Description
7
GND—These pins provide grounding for the internal structures of the chip, and
should all be attached to VSS.
1
1
VSSA
TCS
Analog Ground—This pin supplies an analog ground.
TCS—This Schmitt pin is reserved for factory use and must be tied to VSS for
normal use. In block diagrams, this pin is considered an additional VSS.
Table 5. Supply Capacitors and VPP
No. of
Pins
Signal
Name
Signal
Type
State During
Signal Description
Reset
2
VCAPC
Supply
Supply
VCAPC—Connect each pin to a 2.2µF or greater bypass
capacitor in order to bypass the core logic voltage regulator,
required for proper chip operation. For more information,
please refer to Section 5.2.
1
VPP
Input
Input
VPP—This pin should be left unconnected as an open circuit
for normal functionality.
2.3 Clock and Phase Locked Loop Signals
Table 6. PLL and Clock
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
EXTAL
Input
Input
External Crystal Oscillator Input—This input should be
connected to an 8MHz external crystal or ceramic resonator. For
more information, please refer to Section 3.5.
1
XTAL
Input/
Output
Chip-driven
Crystal Oscillator Output—This output should be connected to
an 8MHz external crystal or ceramic resonator. For more
information, please refer to Section 3.5.
This pin can also be connected to an external clock source. For
more information, please refer to Section 3.5.3.
8
56F805 Technical Data
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