Freescale Semiconductor, Inc.
Introduction
V
DD
Power Port
Ground Port
Power Port
Ground Port
8
GPIOB0–7
GPIOD0–5
Dedicated
GPIO
8
6
V
SS
8*
1
V
V
DDA
SSA
1
PWMA0-5
ISA0-2
6
3
4
PWMA
Port
VCAPC
Other
Supply
Ports
2
1
FAULTA0-3
V
PP
PWMB0-5
ISB0-2
6
3
4
EXTAL
XTAL
PLL
and
Clock
PWMB
Port
1
1
1
56F805
FAULTB0-3
CLKO
SCLK (GPIOE4)
MOSI (GPIOE5)
MISO (GPIOE6)
SS (GPIOE7)
1
1
1
1
A0-A5
6
2
8
External
Address Bus or
GPIO
SPI Port
or GPIO
A6-7 (GPIOE2-E3)
A8-15 (GPIOA0-A7)
External
Data Bus
D0–D15
TXD0 (GPIOE0)
RXD0 (GPIOE1)
16
SCI0 Port
or GPIO
1
1
PS
DS
1
1
1
1
External
Bus Control
SCI1 Port
or GPI0
TXD1 (GPIOD6)
RXD1 (GPIOD7)
1
1
RD
WR
ANA0-7
VREF
8
1
ADCA
Port
PHASEA0 (TA0)
PHASEB0 (TA1)
INDEX0 (TA2)
HOME0 (TA3)
PHASEA1 (TB0)
PHASEB1 (TB1)
INDEX1 (TB2)
HOME1 (TB3)
TCK
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Quadrature
Decoder0 or
Quad Timer A
MSCAN_RX
MSCAN_TX
1
1
CAN
Quadrature
Decoder1 or
Quad Timer B
Quad
Timers
C & D
TC0-1
TD0-3
2
4
TMS
IRQA
1
1
1
1
1
TDI
IRQB
JTAG/OnCE
Port
Interrupt/
Program
Control
TDO
RESET
RSTO
TRST
EXTBOOT
DE
*includes TCS pin which is reserved for factory use and is tied to VSS
1
Figure 2. 56F805 Signals Identified by Functional Group
1. Alternate pin functionality is shown in parenthesis.
56F805 Technical Data
7
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