Datasheet > 56F8027

56F8027

更新时间： 2022-09-22 09:41:09

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		控制器
页数	文件大小	规格书
181页	957K
描述
16-bit Digital Signal Controllers

阅读下载

获取价格

如果您发现信息不准确，欢迎纠错

56F8027 数据手册

connections to the PWM from the TMR and GPIO. These signals can control the PWM outputs in a similar

manner as the PWM generator. See the 56F802x and 56F803x Peripheral Reference Manual for

additional information.

The PWM_reload_sync output can be connected to Timer A’s (TMRA) Channel 3 input; TMRA’s

Channels 2 and 3 outputs are connected to the ADC sync inputs. TMRA Channel 3 output is connected to

SYNC0 and TMRA Channel 2 is connected to SYNC1. SYNC0 is the master ADC sync input that is used

to trigger ADCA and ADCB in sequence and parallel mode. SYNC1 is used to trigger ADCB in parallel

independent mode. These are controlled by bits in the SIM Control Register; see Section 6.3.1.

56F8037/56F8027 Data Sheet, Rev. 6

FreescaleSemiconductor

1...7 8 91011 12 13...181

下载PDF

型号	品牌	描述	获取价格	数据表
56F802E	FREESCALE	16-bit Digital Signal Controllers	获取价格
56F803	FREESCALE	16-bit Digital Signal Controllers	获取价格
56F803	MOTOROLA	56F803 16-bit Hybrid Controller	获取价格
56F803_07	FREESCALE	16-bit Digital Signal Controllers	获取价格
56F8033	FREESCALE	16-bit Digital Signal Controllers	获取价格
56F8035	FREESCALE	16-bit Digital Signal Controllers	获取价格