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54FCT646ATLB PDF预览

54FCT646ATLB

更新时间: 2024-11-19 05:43:35
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
8页 103K
描述
LCC-28, Tube

54FCT646ATLB 数据手册

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FAST CMOS OCTAL  
TRANSCEIVER/  
IDT54/74FCT646T/AT/CT  
REGISTER (3-STATE)  
DESCRIPTION:  
FEATURES:  
TheFCT646Tconsistsofabustransceiverwith3-stateD-typeflip-flops  
andcontrolcircuitryarrangedformultiplexedtransmissionofdatadirectly  
from the data bus or from the internal storage registers. The FCT646T  
utilizes the enable control (G) and direction (DIR) pins to control the  
transceiverfunctions.  
• Std., A, and C grades  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility:  
– VOH = 3.3V (typ.)  
SABandSBAcontrolpinsareprovidedtoselecteitherreal-timeorstored  
data transfer. The circuitry used for select control will eliminate the typical  
decoding glitch that occurs in a multiplexer during the transition between  
storedandreal-timedata.Alowinputlevelselectsreal-timedataandahigh  
selectsstoreddata.  
– VOL = 0.3V (typ.)  
• High Drive outputs (-15mA IOH, 64mA IOL)  
• Meets or exceeds JEDEC standard 18 specifications  
• Military product compliant to MIL-STD-883, Class B and DESC  
listed (dual marked)  
Data on the A or B data bus, or both, can be stored in the internal D flip-  
flops by low-to-high transitions at the appropriate clock pins (CPAB or  
CPBA), regardless of the select or enable control pins.  
• Power off disable outputs permit "live insertion"  
• Available in the following packages:  
– Industrial: SOIC, SSOP, QSOP, TSSOP  
– Military: CERDIP, LCC  
FUNCTIONALBLOCKDIAGRAM  
G
DIR  
CPBA  
SBA  
CPAB  
SAB  
B REG  
ONE OF EIGHT CHANNELS  
1D  
C1  
A REG  
B1  
A1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
JUNE 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-5505/3  

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