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54ACT399WRQMLV PDF预览

54ACT399WRQMLV

更新时间: 2024-11-15 20:34:15
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
9页 193K
描述
ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP16, CERPACK-16

54ACT399WRQMLV 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL16,.25Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.61
Is Samacsys:N系列:ACT
JESD-30 代码:R-GDFP-F16JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:90000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:4
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL16,.25
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class V
座面最大高度:2.032 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn63Pb37)端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40触发器类型:POSITIVE EDGE
宽度:6.35 mm最小 fmax:95 MHz
Base Number Matches:1

54ACT399WRQMLV 数据手册

 浏览型号54ACT399WRQMLV的Datasheet PDF文件第2页浏览型号54ACT399WRQMLV的Datasheet PDF文件第3页浏览型号54ACT399WRQMLV的Datasheet PDF文件第4页浏览型号54ACT399WRQMLV的Datasheet PDF文件第5页浏览型号54ACT399WRQMLV的Datasheet PDF文件第6页浏览型号54ACT399WRQMLV的Datasheet PDF文件第7页 
August 1998  
54ACT399  
Quad 2-Port Register  
General Description  
Features  
n ICC reduced by 50%  
The ’AC/ACT399 is the logical equivalent of a quad 2-input  
multiplexer feeding into four edge-triggered flip-flops. A com-  
mon Select input determines which of the two 4-bit words is  
accepted. The selected data enters the flip-flop on the rising  
edge of the clock.  
n Select inputs from two data sources  
n Fully positive edge-triggered operation  
n Outputs source/sink 24 mA  
n ACT399 has TTL-compatible inputs  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP and Flatpak  
DS100356-1  
IEEE/IEC  
DS100356-3  
Pin Assignment  
for LCC  
DS100356-5  
DS100356-2  
Pin Names  
Description  
Common Select Input  
Clock Pulse Input  
S
CP  
I
I
0a–I 0d  
1a–I1d  
Data Inputs from Source 0  
Data Inputs from Source 1  
Register True Outputs  
Qa–Qd  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
FACT® is a registered trademark of Fairchild Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS100356  
www.national.com  

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