是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | QLCC | 包装说明: | QCCN, LCC20,.35SQ |
针数: | 20 | Reach Compliance Code: | unknown |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.51 |
其他特性: | HOLD MODE; COMMON I/O PINS; GATED OUTPUT CONTROL | 计数方向: | BIDIRECTIONAL |
系列: | ACT | JESD-30 代码: | S-CQCC-N20 |
JESD-609代码: | e0 | 长度: | 8.89 mm |
逻辑集成电路类型: | PARALLEL IN PARALLEL OUT | 最大频率@ Nom-Sup: | 70000000 Hz |
位数: | 8 | 功能数量: | 1 |
端子数量: | 20 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出特性: | 3-STATE |
输出极性: | TRUE | 封装主体材料: | CERAMIC, METAL-SEALED COFIRED |
封装代码: | QCCN | 封装等效代码: | LCC20,.35SQ |
封装形状: | SQUARE | 封装形式: | CHIP CARRIER |
峰值回流温度(摄氏度): | NOT SPECIFIED | 电源: | 5 V |
认证状态: | Not Qualified | 筛选级别: | 38535Q/M;38534H;883B |
座面最大高度: | 2.54 mm | 子类别: | Shift Registers |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 4.5 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | NO LEAD |
端子节距: | 1.27 mm | 端子位置: | QUAD |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 触发器类型: | POSITIVE EDGE |
宽度: | 8.89 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
54ACT299MDS | NSC |
获取价格 |
暂无描述 | |
54ACT299MDS | TI |
获取价格 |
ACT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, UUC2 | |
54ACT32 | STMICROELECTRONICS |
获取价格 |
抗辐照四路2输入或门 | |
54ACT323 | NSC |
获取价格 |
8-Bit Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins | |
54ACT323D | NSC |
获取价格 |
8-Bit Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins | |
54ACT323DM | TI |
获取价格 |
ACT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP | |
54ACT323DMQB | TI |
获取价格 |
ACT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP | |
54ACT323DMQB | FAIRCHILD |
获取价格 |
Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, CDIP20, CER | |
54ACT323DMQB | NSC |
获取价格 |
IC ACT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, C | |
54ACT323F | NSC |
获取价格 |
8-Bit Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins |