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54ACT109D PDF预览

54ACT109D

更新时间: 2024-01-08 10:21:36
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器
页数 文件大小 规格书
8页 171K
描述
Dual JK Positive Edge-Triggered Flip-Flop

54ACT109D 技术参数

生命周期:Obsolete包装说明:DFP, FL16,.3
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.41系列:ACT
JESD-30 代码:R-GDFP-F16JESD-609代码:e0
长度:9.6645 mm负载电容(CL):50 pF
逻辑集成电路类型:J-KBAR FLIP-FLOP最大频率@ Nom-Sup:85000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL16,.3封装形状:RECTANGULAR
封装形式:FLATPACK包装方法:RAIL
电源:5 VProp。Delay @ Nom-Sup:14 ns
传播延迟(tpd):14 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535 Class V座面最大高度:2.032 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn63Pb37)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL总剂量:100k Rad(Si) V
触发器类型:POSITIVE EDGE宽度:6.604 mm
最小 fmax:95 MHzBase Number Matches:1

54ACT109D 数据手册

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August 1998  
54AC109 54ACT109  
Dual JK Positive Edge-Triggered Flip-Flop  
Simultaneous LOW on CD and SD makes both Q and Q  
General Description  
HIGH  
The ’AC/’ACT109 consists of two high-speed completely in-  
dependent transition clocked JK flip-flops. The clocking op-  
eration is independent of rise and fall times of the clock  
waveform. The JK design allows operation as a D flip-flop  
(refer to ’AC/’ACT74 data sheet) by connecting the J and K  
inputs together.  
Features  
n ICC reduced by 50%  
n Outputs source/sink 24 mA  
n ’ACT109 has TTL-compatible inputs  
n Standard Military Drawing (SMD)  
— ’AC109: 5962-89551  
Asynchronous Inputs:  
LOW input to SD (Set) sets Q to HIGH level  
LOW input to CD (Clear) sets Q to LOW level  
Clear and Set are independent of clock  
— ’ACT109: 5962-88534  
Logic Symbol  
IEEE/IEC  
DS100267-1  
DS100267-7  
Pin Names  
J1, J2, K1, K2  
CP1, CP2  
Description  
Data Inputs  
Clock Pulse Inputs  
Direct Clear Inputs  
Direct Set Inputs  
Outputs  
C
D1, CD2  
D1, SD2  
Q1, Q2, Q1, Q2  
S
DS100267-2  
FACT® is a registered trademark of Fairchild Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS100267  
www.national.com  

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