5秒后页面跳转
54ACT109E-QMLV PDF预览

54ACT109E-QMLV

更新时间: 2024-01-07 13:43:19
品牌 Logo 应用领域
其他 - ETC 触发器逻辑集成电路
页数 文件大小 规格书
7页 21K
描述
J-K-Type Flip-Flop

54ACT109E-QMLV 技术参数

生命周期:Obsolete包装说明:DFP, FL16,.3
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.41系列:ACT
JESD-30 代码:R-GDFP-F16JESD-609代码:e0
长度:9.6645 mm负载电容(CL):50 pF
逻辑集成电路类型:J-KBAR FLIP-FLOP最大频率@ Nom-Sup:85000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL16,.3封装形状:RECTANGULAR
封装形式:FLATPACK包装方法:RAIL
电源:5 VProp。Delay @ Nom-Sup:14 ns
传播延迟(tpd):14 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535 Class V座面最大高度:2.032 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn63Pb37)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL总剂量:100k Rad(Si) V
触发器类型:POSITIVE EDGE宽度:6.604 mm
最小 fmax:95 MHzBase Number Matches:1

54ACT109E-QMLV 数据手册

 浏览型号54ACT109E-QMLV的Datasheet PDF文件第2页浏览型号54ACT109E-QMLV的Datasheet PDF文件第3页浏览型号54ACT109E-QMLV的Datasheet PDF文件第4页浏览型号54ACT109E-QMLV的Datasheet PDF文件第5页浏览型号54ACT109E-QMLV的Datasheet PDF文件第6页浏览型号54ACT109E-QMLV的Datasheet PDF文件第7页 
MICROCIRCUIT DATA SHEET  
Original Creation Date: 09/26/97  
Last Update Date: 07/30/99  
MV54ACT109-X REV 0A0  
Last Major Revision Date: 09/26/97  
Dual JK Positive Edge-Triggered Flip-Flop  
General Description  
The ACT109 consists of two high-speed completely independent transition clocked  
JK flip-flops. The clocking operation is independent of rise and fall times of the clock  
waveform. The JK design allows operation as a D flip-flop (refer ACT74 data sheet) by  
connecting the J and K inputs together.  
Asynchronous Inputs:  
LOW input to SD (Set) sets Q to HIGH level  
LOW input to CD (Clear) sets Q to LOW level  
Clear and Set are independent of clock.  
Simultaneous LOW on CD an SD makes both Q and Q HIGH  
Industry Part Number  
NS Part Numbers  
54ACT109  
54ACT109E-QMLV*  
54ACT109ERQMLV*  
54ACT109J-QMLV**  
54ACT109JRQMLV**  
54ACT109W-QMLV***  
54ACT109WRQMLV***  
Prime Die  
J109  
Controlling Document  
5962-88534  
Processing  
Subgrp Description  
Temp (oC)  
MIL-STD-883, Method 5004  
1
Static tests at  
+25 C  
+125 C  
-55 C  
+25 C  
+125 C  
-55 C  
+25 C  
+125 C  
-55 C  
+25 C  
+125 C  
-55 C  
2
Static tests at  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
Quality Conformance Inspection  
5
6
MIL-STD-883, Method 5005  
7
8A  
8B  
9
10  
11  
1

与54ACT109E-QMLV相关器件

型号 品牌 描述 获取价格 数据表
54ACT109ERQMLV ETC J-K-Type Flip-Flop

获取价格

54ACT109F NSC Dual JK Positive Edge-Triggered Flip-Flop

获取价格

54ACT109FM FAIRCHILD J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output

获取价格

54ACT109FMQB TI ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, C

获取价格

54ACT109FMQB-RH TI IC,FLIP-FLOP,DUAL,J/K TYPE,CMOS, RAD HARD,FP,16PIN,CERAMIC

获取价格

54ACT109J-QMLV ETC J-K-Type Flip-Flop

获取价格