是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | QCCN, LCC20,.35SQ | Reach Compliance Code: | compliant |
风险等级: | 5.92 | JESD-30 代码: | S-XQCC-N20 |
JESD-609代码: | e0 | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 最大I(ol): | 0.024 A |
功能数量: | 2 | 端子数量: | 20 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
封装主体材料: | CERAMIC | 封装代码: | QCCN |
封装等效代码: | LCC20,.35SQ | 封装形状: | SQUARE |
封装形式: | CHIP CARRIER | 包装方法: | RAIL |
电源: | 5 V | Prop。Delay @ Nom-Sup: | 14 ns |
认证状态: | Not Qualified | 筛选级别: | 38535Q/M;38534H;883B |
子类别: | FF/Latches | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | MILITARY | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | NO LEAD | 端子节距: | 1.27 mm |
端子位置: | QUAD | 总剂量: | 100k Rad(Si) V |
触发器类型: | POSITIVE EDGE | Base Number Matches: | 1 |
型号 | 品牌 | 描述 | 获取价格 | 数据表 |
54ACT109MDS | TI | ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC, DIE |
获取价格 |
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54ACT109MW8 | TI | ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16 |
获取价格 |
|
54ACT109W-QMLV | ETC | J-K-Type Flip-Flop |
获取价格 |
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54ACT109WRQMLV | ETC | J-K-Type Flip-Flop |
获取价格 |
|
54ACT10FMQB | TI | ACT SERIES, TRIPLE 3-INPUT NAND GATE, CDFP14, CERAMIC, FP-14 |
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54ACT10LM | TI | ACT SERIES, TRIPLE 3-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20 |
获取价格 |