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54AC280 PDF预览

54AC280

更新时间: 2024-02-01 21:20:11
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 186K
描述
9-Bit Parity Generator/Checker

54AC280 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.68
Base Number Matches:1

54AC280 数据手册

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September 1998  
54AC280  
9-Bit Parity Generator/Checker  
General Description  
Features  
n ICC reduced by 50%  
The ’AC280 is a high-speed parity generator/checker that  
accepts nine bits of input data and detects whether an even  
or an odd number of these inputs is HIGH. If an even number  
of inputs is HIGH, the Sum Even output is HIGH. If an odd  
number is HIGH, the Sum Even output is LOW. The Sum  
Odd output is the complement of the Sum Even output.  
n 9-bit width for memory applications  
n Standard Microcircuit Drawing (SMD) 5962-92201  
Logic Symbols  
Connection Diagrams  
Pin Assignment for  
DIP and Flatpak  
DS100359-1  
IEEE/IEC  
DS100359-2  
Pin Assignment for LCC  
DS100359-4  
Pin  
Description  
Data Inputs  
DS100359-3  
Names  
I0–I8  
Truth Table  
Odd Parity Output  
Even Parity Output  
O
E
Number of  
HIGH Inputs  
I0–I8  
Outputs  
Odd  
Even  
0, 2, 4, 6, 8  
1, 3, 5, 7, 9  
H
L
L
H
=
=
H
L
HIGH Voltage Level  
LOW Voltage Level  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS100359  
www.national.com  

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